diff options
| -rw-r--r-- | llvm/lib/CodeGen/MachineFunction.cpp | 11 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/assertion-rc-mismatch.ll | 24 |
2 files changed, 34 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp index 0703df09a60..96a5ccb9691 100644 --- a/llvm/lib/CodeGen/MachineFunction.cpp +++ b/llvm/lib/CodeGen/MachineFunction.cpp @@ -425,7 +425,16 @@ unsigned MachineFunction::addLiveIn(unsigned PReg, MachineRegisterInfo &MRI = getRegInfo(); unsigned VReg = MRI.getLiveInVirtReg(PReg); if (VReg) { - assert(MRI.getRegClass(VReg) == RC && "Register class mismatch!"); + const TargetRegisterClass *VRegRC = MRI.getRegClass(VReg); + (void)VRegRC; + // A physical register can be added several times. + // Between two calls, the register class of the related virtual register + // may have been constrained to match some operation constraints. + // In that case, check that the current register class includes the + // physical register and is a sub class of the specified RC. + assert((VRegRC == RC || (VRegRC->contains(PReg) && + RC->hasSubClassEq(VRegRC))) && + "Register class mismatch!"); return VReg; } VReg = MRI.createVirtualRegister(RC); diff --git a/llvm/test/CodeGen/AArch64/assertion-rc-mismatch.ll b/llvm/test/CodeGen/AArch64/assertion-rc-mismatch.ll new file mode 100644 index 00000000000..02b0c0e786e --- /dev/null +++ b/llvm/test/CodeGen/AArch64/assertion-rc-mismatch.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s +; Test case related to <rdar://problem/15633429>. + +; CHECK-LABEL: small +define i64 @small(i64 %encodedBase) { +cmp: + %lnot.i.i = icmp eq i64 %encodedBase, 0 + br i1 %lnot.i.i, label %if, label %else +if: + %tmp1 = call i8* @llvm.returnaddress(i32 0) + br label %end +else: + %tmp3 = call i8* @llvm.returnaddress(i32 0) + %ptr = getelementptr inbounds i8* %tmp3, i64 -16 + %ld = load i8* %ptr, align 4 + %tmp2 = inttoptr i8 %ld to i8* + br label %end +end: + %tmp = phi i8* [ %tmp1, %if ], [ %tmp2, %else ] + %coerce.val.pi56 = ptrtoint i8* %tmp to i64 + ret i64 %coerce.val.pi56 +} + +declare i8* @llvm.returnaddress(i32) |
