diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll | 4 |
2 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp index 5ad827e8864..66486629bde 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp @@ -2250,6 +2250,13 @@ FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src, SDValue &Neg, Src = DAG.getRegister(AMDGPU::ALU_CONST, MVT::f32); return true; } + case AMDGPU::MOV_IMM_GLOBAL_ADDR: + // Check if the Imm slot is used. Taken from below. + if (cast<ConstantSDNode>(Imm)->getZExtValue()) + return false; + Imm = Src.getOperand(0); + Src = DAG.getRegister(AMDGPU::ALU_LITERAL_X, MVT::i32); + return true; case AMDGPU::MOV_IMM_I32: case AMDGPU::MOV_IMM_F32: { unsigned ImmReg = AMDGPU::ALU_LITERAL_X; diff --git a/llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll b/llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll index 4d74d317bd1..1f9b536cd80 100644 --- a/llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll +++ b/llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll @@ -14,6 +14,7 @@ ; EG: VTX_READ_32 ; EG: @float_gv ; EG-NOT: MOVA_INT +; EG-NOT: MOV define void @float(float addrspace(1)* %out, i32 %index) { entry: %0 = getelementptr inbounds [5 x float], [5 x float] addrspace(2)* @float_gv, i32 0, i32 %index @@ -31,6 +32,7 @@ entry: ; EG: VTX_READ_32 ; EG: @i32_gv ; EG-NOT: MOVA_INT +; EG-NOT: MOV define void @i32(i32 addrspace(1)* %out, i32 %index) { entry: %0 = getelementptr inbounds [5 x i32], [5 x i32] addrspace(2)* @i32_gv, i32 0, i32 %index @@ -50,6 +52,7 @@ entry: ; EG: VTX_READ_32 ; EG: @struct_foo_gv ; EG-NOT: MOVA_INT +; EG-NOT: MOV define void @struct_foo_gv_load(i32 addrspace(1)* %out, i32 %index) { %gep = getelementptr inbounds [1 x %struct.foo], [1 x %struct.foo] addrspace(2)* @struct_foo_gv, i32 0, i32 0, i32 1, i32 %index %load = load i32, i32 addrspace(2)* %gep, align 4 @@ -68,6 +71,7 @@ define void @struct_foo_gv_load(i32 addrspace(1)* %out, i32 %index) { ; EG: VTX_READ_32 ; EG: @array_v1_gv ; EG-NOT: MOVA_INT +; EG-NOT: MOV define void @array_v1_gv_load(<1 x i32> addrspace(1)* %out, i32 %index) { %gep = getelementptr inbounds [4 x <1 x i32>], [4 x <1 x i32>] addrspace(2)* @array_v1_gv, i32 0, i32 %index %load = load <1 x i32>, <1 x i32> addrspace(2)* %gep, align 4 |
