diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b8ffd7518ef..8827ff3de3f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -39111,27 +39111,26 @@ static SDValue combineLoad(SDNode *N, SelectionDAG &DAG, Ext == ISD::NON_EXTLOAD && ((Ld->isNonTemporal() && !Subtarget.hasInt256() && Alignment >= 16) || (TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), RegVT, - *Ld->getMemOperand(), &Fast) && !Fast))) { + *Ld->getMemOperand(), &Fast) && + !Fast))) { unsigned NumElems = RegVT.getVectorNumElements(); if (NumElems < 2) return SDValue(); - SDValue Ptr = Ld->getBasePtr(); - + unsigned HalfAlign = 16; + SDValue Ptr1 = Ld->getBasePtr(); + SDValue Ptr2 = DAG.getMemBasePlusOffset(Ptr1, HalfAlign, dl); EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), MemVT.getScalarType(), - NumElems/2); + NumElems / 2); SDValue Load1 = - DAG.getLoad(HalfVT, dl, Ld->getChain(), Ptr, Ld->getPointerInfo(), + DAG.getLoad(HalfVT, dl, Ld->getChain(), Ptr1, Ld->getPointerInfo(), Alignment, Ld->getMemOperand()->getFlags()); - - Ptr = DAG.getMemBasePlusOffset(Ptr, 16, dl); - SDValue Load2 = - DAG.getLoad(HalfVT, dl, Ld->getChain(), Ptr, - Ld->getPointerInfo().getWithOffset(16), - MinAlign(Alignment, 16U), Ld->getMemOperand()->getFlags()); + SDValue Load2 = DAG.getLoad(HalfVT, dl, Ld->getChain(), Ptr2, + Ld->getPointerInfo().getWithOffset(HalfAlign), + MinAlign(Alignment, HalfAlign), + Ld->getMemOperand()->getFlags()); SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, - Load1.getValue(1), - Load2.getValue(1)); + Load1.getValue(1), Load2.getValue(1)); SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2); return DCI.CombineTo(N, NewVec, TF, true); |
