summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h9
-rw-r--r--llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp46
2 files changed, 31 insertions, 24 deletions
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h b/llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h
index 8f7042655cb..7ab2fa14a4b 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h
@@ -415,6 +415,15 @@ public:
/// \post !returnedVal.empty().
InstructionMappings getInstrPossibleMappings(const MachineInstr &MI) const;
+ /// Get the size in bits of \p Reg.
+ /// Utility method to get the size of any registers. Unlike
+ /// MachineRegisterInfo::getSize, the register does not need to be a
+ /// virtual register.
+ ///
+ /// \pre \p Reg != 0 (NoRegister).
+ static unsigned getSizeInBits(unsigned Reg, const MachineRegisterInfo &MRI,
+ const TargetRegisterInfo &TRI);
+
/// Check that information hold by this instance make sense for the
/// given \p TRI.
///
diff --git a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
index 518dc0ceaca..64efcd6246b 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
@@ -35,30 +35,6 @@ using namespace llvm;
const unsigned RegisterBankInfo::DefaultMappingID = UINT_MAX;
const unsigned RegisterBankInfo::InvalidMappingID = UINT_MAX - 1;
-/// Get the size in bits of the \p Reg.
-///
-/// \pre \p Reg != 0 (NoRegister).
-static unsigned getSizeInBits(unsigned Reg, const MachineRegisterInfo &MRI,
- const TargetRegisterInfo &TRI) {
- const TargetRegisterClass *RC = nullptr;
- if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
- // The size is not directly available for physical registers.
- // Instead, we need to access a register class that contains Reg and
- // get the size of that register class.
- RC = TRI.getMinimalPhysRegClass(Reg);
- } else {
- unsigned RegSize = MRI.getSize(Reg);
- // If Reg is not a generic register, query the register class to
- // get its size.
- if (RegSize)
- return RegSize;
- // Since Reg is not a generic register, it must have a register class.
- RC = MRI.getRegClass(Reg);
- }
- assert(RC && "Unable to deduce the register class");
- return RC->getSize() * 8;
-}
-
//------------------------------------------------------------------------------
// RegisterBankInfo implementation.
//------------------------------------------------------------------------------
@@ -356,6 +332,28 @@ RegisterBankInfo::getInstrAlternativeMappings(const MachineInstr &MI) const {
return InstructionMappings();
}
+unsigned RegisterBankInfo::getSizeInBits(unsigned Reg,
+ const MachineRegisterInfo &MRI,
+ const TargetRegisterInfo &TRI) {
+ const TargetRegisterClass *RC = nullptr;
+ if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ // The size is not directly available for physical registers.
+ // Instead, we need to access a register class that contains Reg and
+ // get the size of that register class.
+ RC = TRI.getMinimalPhysRegClass(Reg);
+ } else {
+ unsigned RegSize = MRI.getSize(Reg);
+ // If Reg is not a generic register, query the register class to
+ // get its size.
+ if (RegSize)
+ return RegSize;
+ // Since Reg is not a generic register, it must have a register class.
+ RC = MRI.getRegClass(Reg);
+ }
+ assert(RC && "Unable to deduce the register class");
+ return RC->getSize() * 8;
+}
+
//------------------------------------------------------------------------------
// Helper classes implementation.
//------------------------------------------------------------------------------
OpenPOWER on IntegriCloud