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-rw-r--r--llvm/include/llvm/CodeGen/LiveRegUnits.h13
-rw-r--r--llvm/lib/CodeGen/LivePhysRegs.cpp28
-rw-r--r--llvm/lib/CodeGen/LiveRegUnits.cpp45
3 files changed, 44 insertions, 42 deletions
diff --git a/llvm/include/llvm/CodeGen/LiveRegUnits.h b/llvm/include/llvm/CodeGen/LiveRegUnits.h
index 314afad9297..1ed091e3bb5 100644
--- a/llvm/include/llvm/CodeGen/LiveRegUnits.h
+++ b/llvm/include/llvm/CodeGen/LiveRegUnits.h
@@ -160,6 +160,19 @@ private:
void addPristines(const MachineFunction &MF);
};
+/// Returns an iterator range over all physical register and mask operands for
+/// \p MI and bundled instructions. This also skips any debug operands.
+inline iterator_range<filter_iterator<
+ ConstMIBundleOperands, std::function<bool(const MachineOperand &)>>>
+phys_regs_and_masks(const MachineInstr &MI) {
+ std::function<bool(const MachineOperand &)> Pred =
+ [](const MachineOperand &MOP) {
+ return MOP.isRegMask() || (MOP.isReg() && !MOP.isDebug() &&
+ Register::isPhysicalRegister(MOP.getReg()));
+ };
+ return make_filter_range(const_mi_bundle_ops(MI), Pred);
+}
+
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEREGUNITS_H
diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp
index bdb165bbc90..7a5cffca347 100644
--- a/llvm/lib/CodeGen/LivePhysRegs.cpp
+++ b/llvm/lib/CodeGen/LivePhysRegs.cpp
@@ -13,6 +13,7 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/LivePhysRegs.h"
+#include "llvm/CodeGen/LiveRegUnits.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
@@ -42,28 +43,23 @@ void LivePhysRegs::removeRegsInMask(const MachineOperand &MO,
/// Remove defined registers and regmask kills from the set.
void LivePhysRegs::removeDefs(const MachineInstr &MI) {
- for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
- if (O->isReg()) {
- if (!O->isDef() || O->isDebug())
- continue;
- Register Reg = O->getReg();
- if (!Register::isPhysicalRegister(Reg))
- continue;
- removeReg(Reg);
- } else if (O->isRegMask())
- removeRegsInMask(*O);
+ for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
+ if (MOP.isRegMask()) {
+ removeRegsInMask(MOP);
+ continue;
+ }
+
+ if (MOP.isDef())
+ removeReg(MOP.getReg());
}
}
/// Add uses to the set.
void LivePhysRegs::addUses(const MachineInstr &MI) {
- for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
- if (!O->isReg() || !O->readsReg() || O->isDebug())
- continue;
- Register Reg = O->getReg();
- if (!Register::isPhysicalRegister(Reg))
+ for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
+ if (!MOP.isReg() || !MOP.readsReg())
continue;
- addReg(Reg);
+ addReg(MOP.getReg());
}
}
diff --git a/llvm/lib/CodeGen/LiveRegUnits.cpp b/llvm/lib/CodeGen/LiveRegUnits.cpp
index 97763def1f4..b2731aa0e7d 100644
--- a/llvm/lib/CodeGen/LiveRegUnits.cpp
+++ b/llvm/lib/CodeGen/LiveRegUnits.cpp
@@ -43,41 +43,34 @@ void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
void LiveRegUnits::stepBackward(const MachineInstr &MI) {
// Remove defined registers and regmask kills from the set.
- for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
- if (O->isReg()) {
- if (!O->isDef() || O->isDebug())
- continue;
- Register Reg = O->getReg();
- if (!Register::isPhysicalRegister(Reg))
- continue;
- removeReg(Reg);
- } else if (O->isRegMask())
- removeRegsNotPreserved(O->getRegMask());
+ for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
+ if (MOP.isRegMask()) {
+ removeRegsNotPreserved(MOP.getRegMask());
+ continue;
+ }
+
+ if (MOP.isDef())
+ removeReg(MOP.getReg());
}
// Add uses to the set.
- for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
- if (!O->isReg() || !O->readsReg() || O->isDebug())
- continue;
- Register Reg = O->getReg();
- if (!Register::isPhysicalRegister(Reg))
+ for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
+ if (!MOP.isReg() || !MOP.readsReg())
continue;
- addReg(Reg);
+ addReg(MOP.getReg());
}
}
void LiveRegUnits::accumulate(const MachineInstr &MI) {
// Add defs, uses and regmask clobbers to the set.
- for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
- if (O->isReg()) {
- Register Reg = O->getReg();
- if (!Register::isPhysicalRegister(Reg))
- continue;
- if (!O->isDef() && !O->readsReg())
- continue;
- addReg(Reg);
- } else if (O->isRegMask())
- addRegsInMask(O->getRegMask());
+ for (const MachineOperand &MOP : phys_regs_and_masks(MI)) {
+ if (MOP.isRegMask()) {
+ addRegsInMask(MOP.getRegMask());
+ continue;
+ }
+ if (!MOP.isDef() && !MOP.readsReg())
+ continue;
+ addReg(MOP.getReg());
}
}
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