diff options
| -rw-r--r-- | llvm/test/CodeGen/SystemZ/vec-trunc-to-i1.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/SystemZ/vec-trunc-to-i1.ll b/llvm/test/CodeGen/SystemZ/vec-trunc-to-i1.ll index 2901cf0f29a..fe4ae4574a6 100644 --- a/llvm/test/CodeGen/SystemZ/vec-trunc-to-i1.ll +++ b/llvm/test/CodeGen/SystemZ/vec-trunc-to-i1.ll @@ -2,7 +2,6 @@ ; ; Check that a widening truncate to a vector of i1 elements can be handled. -; NOTE: REG2 is actually not needed (tempororary FAIL) define void @pr32275(<4 x i8> %B15) { ; CHECK-LABEL: pr32275: ; CHECK: # %bb.0: # %BB @@ -11,9 +10,10 @@ define void @pr32275(<4 x i8> %B15) { ; CHECK-NEXT: vlgvb %r1, %v24, 1 ; CHECK-NEXT: vlvgp [[REG1:%v[0-9]]], %r1, %r0 ; CHECK-NEXT: vlgvb %r0, %v24, 0 +; CHECK-NEXT: vlgvb [[REG3:%r[0-9]]], %v24, 2 +; CHECK: .LBB0_1: ; CHECK-DAG: vlr [[REG2:%v[0-9]]], [[REG1]] ; CHECK-DAG: vlvgf [[REG2]], %r0, 0 -; CHECK-DAG: vlgvb [[REG3:%r[0-9]]], %v24, 2 ; CHECK-NEXT: vlvgf [[REG2]], [[REG3]], 2 ; CHECK-NEXT: vn [[REG2]], [[REG2]], [[REG0]] ; CHECK-NEXT: vlgvf [[REG4:%r[0-9]]], [[REG2]], 3 |
