diff options
| -rw-r--r-- | llvm/include/llvm/CodeGen/TargetPassConfig.h | 5 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/TargetPassConfig.cpp | 13 |
2 files changed, 18 insertions, 0 deletions
diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h index a6110a63435..6f94ae455ee 100644 --- a/llvm/include/llvm/CodeGen/TargetPassConfig.h +++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h @@ -281,6 +281,11 @@ public: /// verification is enabled. void addVerifyPass(const std::string &Banner); + /// Check whether or not GlobalISel should abort on error. + /// When this is disable, GlobalISel will fall back on SDISel instead of + /// erroring out. + virtual bool isGlobalISelAbortEnabled() const; + protected: // Helper to verify the analysis is really immutable. void setOpt(bool &Opt, bool Val); diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp index 94ee30264dd..88b94f51928 100644 --- a/llvm/lib/CodeGen/TargetPassConfig.cpp +++ b/llvm/lib/CodeGen/TargetPassConfig.cpp @@ -98,6 +98,12 @@ PrintMachineInstrs("print-machineinstrs", cl::ValueOptional, cl::desc("Print machine instrs"), cl::value_desc("pass-name"), cl::init("option-unspecified")); +static cl::opt<bool> EnableGlobalISelAbort( + "global-isel-abort", cl::Hidden, + cl::desc("Enable abort calls when \"global\" instruction selection " + "fails to lower/select an instruction"), + cl::init(true)); + // Temporary option to allow experimenting with MachineScheduler as a post-RA // scheduler. Targets can "properly" enable this with // substitutePass(&PostRASchedulerID, &PostMachineSchedulerID). @@ -888,3 +894,10 @@ void TargetPassConfig::addBlockPlacement() { addPass(&MachineBlockPlacementStatsID); } } + +//===---------------------------------------------------------------------===// +/// GlobalISel Configuration +//===---------------------------------------------------------------------===// +bool TargetPassConfig::isGlobalISelAbortEnabled() const { + return EnableGlobalISelAbort; +} |
