diff options
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp | 10 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/Windows/mov32t-range.s | 37 |
3 files changed, 44 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp index 701a6320d48..5b51a52f828 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp @@ -1029,9 +1029,6 @@ ARMMCCodeEmitter::getHiLo16ImmOpValue(const MCInst &MI, unsigned OpIdx, switch (ARM16Expr->getKind()) { default: llvm_unreachable("Unsupported ARMFixup"); case ARMMCExpr::VK_ARM_HI16: - if (Triple(STI.getTargetTriple()).isOSWindows()) - return 0; - Kind = MCFixupKind(isThumb2(STI) ? ARM::fixup_t2_movt_hi16 : ARM::fixup_arm_movt_hi16); break; diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp index ba9df6e962c..d31f1f41c69 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp @@ -27,6 +27,8 @@ public: unsigned getRelocType(const MCValue &Target, const MCFixup &Fixup, bool IsCrossSection) const override; + + bool recordRelocation(const MCFixup &) const override; }; unsigned ARMWinCOFFObjectWriter::getRelocType(const MCValue &Target, @@ -61,12 +63,14 @@ unsigned ARMWinCOFFObjectWriter::getRelocType(const MCValue &Target, case ARM::fixup_arm_thumb_blx: return COFF::IMAGE_REL_ARM_BLX23T; case ARM::fixup_t2_movw_lo16: - return COFF::IMAGE_REL_ARM_MOV32T; case ARM::fixup_t2_movt_hi16: - llvm_unreachable("High-word for pair-wise relocations are contiguously " - "addressed as an IMAGE_REL_ARM_MOV32T relocation"); + return COFF::IMAGE_REL_ARM_MOV32T; } } + +bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const { + return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16; +} } namespace llvm { diff --git a/llvm/test/MC/ARM/Windows/mov32t-range.s b/llvm/test/MC/ARM/Windows/mov32t-range.s new file mode 100644 index 00000000000..fef8ff2aca7 --- /dev/null +++ b/llvm/test/MC/ARM/Windows/mov32t-range.s @@ -0,0 +1,37 @@ +@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \ +@ RUN: | llvm-readobj -r - | FileCheck -check-prefix CHECK-RELOCATIONS %s + +@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \ +@ RUN: | llvm-objdump -d - | FileCheck -check-prefix CHECK-ENCODING %s + + .syntax unified + .thumb + .text + + .def truncation + .scl 3 + .type 32 + .endef + .align 2 + .thumb_func +truncation: + movw r0, :lower16:.Lerange + movt r0, :upper16:.Lerange + bx lr + + .section .rdata,"rd" +.Lbuffer: + .zero 65536 +.Lerange: + .asciz "-erange" + +@ CHECK-RELOCATIONS: Relocations [ +@ CHECK-RELOCATIONS: .text { +@ CHECK-RELOCATIONS: 0x0 IMAGE_REL_ARM_MOV32T .rdata +@ CHECK-RELOCATIONS-NOT: 0x4 IMAGE_REL_ARM_MOV32T .rdata +@ CHECK-RELOCATIONS: } +@ CHECK-RELOCATIONS: ] + +@ CHECK-ENCODING: 0: 40 f2 00 00 +@ CHECK-ENCODING-NEXT: 4: c0 f2 01 00 + |
