summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--llvm/include/llvm/CodeGen/MachineBasicBlock.h6
-rw-r--r--llvm/lib/CodeGen/MachineBasicBlock.cpp18
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/FastISel.cpp25
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp10
-rw-r--r--llvm/lib/Target/AArch64/AArch64FastISel.cpp11
-rw-r--r--llvm/test/CodeGen/MIR/X86/newline-handling.mir4
-rw-r--r--llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir4
7 files changed, 48 insertions, 30 deletions
diff --git a/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
index 07fa3f603d7..edf44884ec5 100644
--- a/llvm/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
@@ -425,6 +425,12 @@ public:
/// Note that duplicate Machine CFG edges are not allowed.
void addSuccessor(MachineBasicBlock *Succ, uint32_t Weight = 0);
+ /// Add Succ as a successor of this MachineBasicBlock. The Predecessors list
+ /// of Succ is automatically updated. The weight is not provided because BPI
+ /// is not available (e.g. -O0 is used), in which case edge weights won't be
+ /// used. Using this interface can save some space.
+ void addSuccessorWithoutWeight(MachineBasicBlock *Succ);
+
/// Set successor weight of a given iterator.
void setSuccWeight(succ_iterator I, uint32_t Weight);
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 9668a09f050..ab865ff8152 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -506,15 +506,19 @@ void MachineBasicBlock::updateTerminator() {
}
void MachineBasicBlock::addSuccessor(MachineBasicBlock *Succ, uint32_t Weight) {
-
- // If we see non-zero value for the first time it means we actually use Weight
- // list, so we fill all Weights with 0's.
- if (Weight != 0 && Weights.empty())
- Weights.resize(Successors.size());
-
- if (Weight != 0 || !Weights.empty())
+ // Weight list is either empty (if successor list isn't empty, this means
+ // disabled optimization) or has the same size as successor list.
+ if (!(Weights.empty() && !Successors.empty()))
Weights.push_back(Weight);
+ Successors.push_back(Succ);
+ Succ->addPredecessor(this);
+}
+void MachineBasicBlock::addSuccessorWithoutWeight(MachineBasicBlock *Succ) {
+ // We need to make sure weight list is either empty or has the same size of
+ // successor list. When this function is called, we can safely delete all
+ // weight in the list.
+ Weights.clear();
Successors.push_back(Succ);
Succ->addPredecessor(this);
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
index 99f4ef70aed..adc51c55564 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -1394,25 +1394,28 @@ void FastISel::fastEmitBranch(MachineBasicBlock *MSucc, DebugLoc DbgLoc) {
TII.InsertBranch(*FuncInfo.MBB, MSucc, nullptr,
SmallVector<MachineOperand, 0>(), DbgLoc);
}
- uint32_t BranchWeight = 0;
- if (FuncInfo.BPI)
- BranchWeight = FuncInfo.BPI->getEdgeWeight(FuncInfo.MBB->getBasicBlock(),
- MSucc->getBasicBlock());
- FuncInfo.MBB->addSuccessor(MSucc, BranchWeight);
+ if (FuncInfo.BPI) {
+ uint32_t BranchWeight = FuncInfo.BPI->getEdgeWeight(
+ FuncInfo.MBB->getBasicBlock(), MSucc->getBasicBlock());
+ FuncInfo.MBB->addSuccessor(MSucc, BranchWeight);
+ } else
+ FuncInfo.MBB->addSuccessorWithoutWeight(MSucc);
}
void FastISel::finishCondBranch(const BasicBlock *BranchBB,
MachineBasicBlock *TrueMBB,
MachineBasicBlock *FalseMBB) {
- uint32_t BranchWeight = 0;
- if (FuncInfo.BPI)
- BranchWeight = FuncInfo.BPI->getEdgeWeight(BranchBB,
- TrueMBB->getBasicBlock());
// Add TrueMBB as successor unless it is equal to the FalseMBB: This can
// happen in degenerate IR and MachineIR forbids to have a block twice in the
// successor/predecessor lists.
- if (TrueMBB != FalseMBB)
- FuncInfo.MBB->addSuccessor(TrueMBB, BranchWeight);
+ if (TrueMBB != FalseMBB) {
+ if (FuncInfo.BPI) {
+ uint32_t BranchWeight =
+ FuncInfo.BPI->getEdgeWeight(BranchBB, TrueMBB->getBasicBlock());
+ FuncInfo.MBB->addSuccessor(TrueMBB, BranchWeight);
+ } else
+ FuncInfo.MBB->addSuccessorWithoutWeight(TrueMBB);
+ }
fastEmitBranch(FalseMBB, DbgLoc);
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 0e5a8f70bce..8d04f47fa96 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -1499,9 +1499,13 @@ uint32_t SelectionDAGBuilder::getEdgeWeight(const MachineBasicBlock *Src,
void SelectionDAGBuilder::
addSuccessorWithWeight(MachineBasicBlock *Src, MachineBasicBlock *Dst,
uint32_t Weight /* = 0 */) {
- if (!Weight)
- Weight = getEdgeWeight(Src, Dst);
- Src->addSuccessor(Dst, Weight);
+ if (!FuncInfo.BPI)
+ Src->addSuccessorWithoutWeight(Dst);
+ else {
+ if (!Weight)
+ Weight = getEdgeWeight(Src, Dst);
+ Src->addSuccessor(Dst, Weight);
+ }
}
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index 6530302531b..2f50480efbe 100644
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -2376,11 +2376,12 @@ bool AArch64FastISel::selectBranch(const Instruction *I) {
.addMBB(Target);
// Obtain the branch weight and add the target to the successor list.
- uint32_t BranchWeight = 0;
- if (FuncInfo.BPI)
- BranchWeight = FuncInfo.BPI->getEdgeWeight(BI->getParent(),
- Target->getBasicBlock());
- FuncInfo.MBB->addSuccessor(Target, BranchWeight);
+ if (FuncInfo.BPI) {
+ uint32_t BranchWeight =
+ FuncInfo.BPI->getEdgeWeight(BI->getParent(), Target->getBasicBlock());
+ FuncInfo.MBB->addSuccessor(Target, BranchWeight);
+ } else
+ FuncInfo.MBB->addSuccessorWithoutWeight(Target);
return true;
} else if (foldXALUIntrinsic(CC, I, BI->getCondition())) {
// Fake request the condition, otherwise the intrinsic might be completely
diff --git a/llvm/test/CodeGen/MIR/X86/newline-handling.mir b/llvm/test/CodeGen/MIR/X86/newline-handling.mir
index a61df00ce39..b5ed3b7f27e 100644
--- a/llvm/test/CodeGen/MIR/X86/newline-handling.mir
+++ b/llvm/test/CodeGen/MIR/X86/newline-handling.mir
@@ -35,7 +35,7 @@ liveins:
# CHECK-LABEL: name: foo
# CHECK: body: |
# CHECK-NEXT: bb.0.entry:
-# CHECK-NEXT: successors: %bb.1.less, %bb.2.exit
+# CHECK-NEXT: successors: %bb.1.less(0), %bb.2.exit(0)
# CHECK-NEXT: liveins: %edi
# CHECK: CMP32ri8 %edi, 10, implicit-def %eflags
# CHECK-NEXT: JG_1 %bb.2.exit, implicit killed %eflags
@@ -79,7 +79,7 @@ liveins:
# CHECK-LABEL: name: bar
# CHECK: body: |
# CHECK-NEXT: bb.0.entry:
-# CHECK-NEXT: successors: %bb.1.less, %bb.2.exit
+# CHECK-NEXT: successors: %bb.1.less(0), %bb.2.exit(0)
# CHECK-NEXT: liveins: %edi
# CHECK: CMP32ri8 %edi, 10, implicit-def %eflags
# CHECK-NEXT: JG_1 %bb.2.exit, implicit killed %eflags
diff --git a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir
index 2323a39e85f..aa80fe9fbee 100644
--- a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir
+++ b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir
@@ -32,7 +32,7 @@
name: foo
body: |
; CHECK-LABEL: bb.0.entry:
- ; CHECK: successors: %bb.1.less, %bb.2.exit
+ ; CHECK: successors: %bb.1.less(0), %bb.2.exit(0)
; CHECK-LABEL: bb.1.less:
bb.0.entry:
successors: %bb.1.less, %bb.2.exit
@@ -58,7 +58,7 @@ body: |
; Verify that we can have multiple lists of successors that will be merged
; into one.
; CHECK-LABEL: bb.0.entry:
- ; CHECK: successors: %bb.1, %bb.2
+ ; CHECK: successors: %bb.1(0), %bb.2(0)
bb.0.entry:
liveins: %edi
successors: %bb.1
OpenPOWER on IntegriCloud