diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 6 | 
2 files changed, 4 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 1ddceb1abf2..17c6375c4a1 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -869,13 +869,10 @@ X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,      case X86::MOVSDrm:      case X86::MOVAPSrm:      case X86::MOVUPSrm: -    case X86::MOVUPSrm_Int:      case X86::MOVAPDrm:      case X86::MOVDQArm:      case X86::MMX_MOVD64rm: -    case X86::MMX_MOVQ64rm: -    case X86::FsMOVAPSrm: -    case X86::FsMOVAPDrm: { +    case X86::MMX_MOVQ64rm: {        // Loads from constant pools are trivially rematerializable.        if (MI->getOperand(1).isReg() &&            MI->getOperand(2).isImm() && diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index ee63d56f3f1..83e7088f37a 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -497,7 +497,7 @@ def FsMOVAPSrr : PSI<0x28, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src),  // Alias instruction to load FR32 from f128mem using movaps. Upper bits are  // disregarded. -let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in +let canFoldAsLoad = 1 in  def FsMOVAPSrm : PSI<0x28, MRMSrcMem, (outs FR32:$dst), (ins f128mem:$src),                       "movaps\t{$src, $dst|$dst, $src}",                       [(set FR32:$dst, (alignedloadfsf32 addr:$src))]>; @@ -715,7 +715,7 @@ def MOVUPSmr : PSI<0x11, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),                     [(store (v4f32 VR128:$src), addr:$dst)]>;  // Intrinsic forms of MOVUPS load and store -let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in +let canFoldAsLoad = 1 in  def MOVUPSrm_Int : PSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),                         "movups\t{$src, $dst|$dst, $src}",                         [(set VR128:$dst, (int_x86_sse_loadu_ps addr:$src))]>; @@ -1256,7 +1256,7 @@ def FsMOVAPDrr : PDI<0x28, MRMSrcReg, (outs FR64:$dst), (ins FR64:$src),  // Alias instruction to load FR64 from f128mem using movapd. Upper bits are  // disregarded. -let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in +let canFoldAsLoad = 1 in  def FsMOVAPDrm : PDI<0x28, MRMSrcMem, (outs FR64:$dst), (ins f128mem:$src),                       "movapd\t{$src, $dst|$dst, $src}",                       [(set FR64:$dst, (alignedloadfsf64 addr:$src))]>;  | 

