2 files changed, 26 insertions, 54 deletions
diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
index 779c2193056..9d6795f93ef 100644
--- a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
+++ b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp
@@ -672,20 +672,22 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
     break;
 
   case X86::MOVPQI2QIrr:
-  case X86::MOVZPQILo2PQIrr:
-  case X86::VMOVPQI2QIrr:
-  case X86::VMOVZPQILo2PQIrr:
-    Src1Name = getRegName(MI->getOperand(1).getReg());
-  // FALL THROUGH.
-  case X86::MOVQI2PQIrm:
+  case X86::MOVZPQILo2PQIrr:
+  case X86::VMOVPQI2QIrr:
+  case X86::VMOVZPQILo2PQIrr:
+  case X86::VMOVZPQILo2PQIZrr:
+    Src1Name = getRegName(MI->getOperand(1).getReg());
+  // FALL THROUGH.
+  case X86::MOVQI2PQIrm:
   case X86::MOVZQI2PQIrm:
   case X86::MOVZPQILo2PQIrm:
-  case X86::VMOVQI2PQIrm:
-  case X86::VMOVZQI2PQIrm:
-  case X86::VMOVZPQILo2PQIrm:
-    DecodeZeroMoveLowMask(MVT::v2i64, ShuffleMask);
-    DestName = getRegName(MI->getOperand(0).getReg());
-    break;
+  case X86::VMOVQI2PQIrm:
+  case X86::VMOVZQI2PQIrm:
+  case X86::VMOVZPQILo2PQIrm:
+  case X86::VMOVZPQILo2PQIZrm:
+    DecodeZeroMoveLowMask(MVT::v2i64, ShuffleMask);
+    DestName = getRegName(MI->getOperand(0).getReg());
+    break;
 
   case X86::MOVDI2PDIrm:
   case X86::VMOVDI2PDIrm:
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll b/llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
index 624b785db19..1d32f9e3852 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
@@ -687,20 +687,10 @@ define <2 x i64> @shuffle_v2i64_0z(<2 x i64> %a) {
 ; SSE-NEXT:    movq {{.*#+}} xmm0 = xmm0[0],zero
 ; SSE-NEXT:    retq
 ;
-; AVX1-LABEL: shuffle_v2i64_0z:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: shuffle_v2i64_0z:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
-; AVX2-NEXT:    retq
-;
-; AVX512VL-LABEL: shuffle_v2i64_0z:
-; AVX512VL:       # BB#0:
-; AVX512VL-NEXT:    vmovq %xmm0, %xmm0
-; AVX512VL-NEXT:    retq
+; AVX-LABEL: shuffle_v2i64_0z:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
+; AVX-NEXT:    retq
   %shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3>
   ret <2 x i64> %shuffle
 }
@@ -785,20 +775,10 @@ define <2 x double> @shuffle_v2f64_0z(<2 x double> %a) {
 ; SSE-NEXT:    movq {{.*#+}} xmm0 = xmm0[0],zero
 ; SSE-NEXT:    retq
 ;
-; AVX1-LABEL: shuffle_v2f64_0z:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: shuffle_v2f64_0z:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
-; AVX2-NEXT:    retq
-;
-; AVX512VL-LABEL: shuffle_v2f64_0z:
-; AVX512VL:       # BB#0:
-; AVX512VL-NEXT:    vmovq %xmm0, %xmm0
-; AVX512VL-NEXT:    retq
+; AVX-LABEL: shuffle_v2f64_0z:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
+; AVX-NEXT:    retq
   %shuffle = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %shuffle
 }
@@ -1032,20 +1012,10 @@ define <2 x double> @insert_reg_and_zero_v2f64(double %a) {
 ; SSE-NEXT:    movq {{.*#+}} xmm0 = xmm0[0],zero
 ; SSE-NEXT:    retq
 ;
-; AVX1-LABEL: insert_reg_and_zero_v2f64:
-; AVX1:       # BB#0:
-; AVX1-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: insert_reg_and_zero_v2f64:
-; AVX2:       # BB#0:
-; AVX2-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
-; AVX2-NEXT:    retq
-;
-; AVX512VL-LABEL: insert_reg_and_zero_v2f64:
-; AVX512VL:       # BB#0:
-; AVX512VL-NEXT:    vmovq %xmm0, %xmm0
-; AVX512VL-NEXT:    retq
+; AVX-LABEL: insert_reg_and_zero_v2f64:
+; AVX:       # BB#0:
+; AVX-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
+; AVX-NEXT:    retq
   %v = insertelement <2 x double> undef, double %a, i32 0
   %shuffle = shufflevector <2 x double> %v, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
   ret <2 x double> %shuffle