diff options
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 109 | ||||
| -rw-r--r-- | clang/test/Driver/x86-march.c | 105 | ||||
| -rw-r--r-- | clang/test/Frontend/x86-target-cpu.c | 28 |
3 files changed, 204 insertions, 38 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 1dfddb559d2..5eda616f6a9 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -1835,28 +1835,42 @@ class X86TargetInfo : public TargetInfo { /// \name Atom /// Atom processors //@{ - CK_Atom, + CK_Bonnell, CK_Silvermont, //@} /// \name Nehalem /// Nehalem microarchitecture based processors. - //@{ - CK_Corei7, - CK_Corei7AVX, - CK_CoreAVXi, - CK_CoreAVX2, + CK_Nehalem, + + /// \name Westmere + /// Westmere microarchitecture based processors. + CK_Westmere, + + /// \name Sandy Bridge + /// Sandy Bridge microarchitecture based processors. + CK_SandyBridge, + + /// \name Ivy Bridge + /// Ivy Bridge microarchitecture based processors. + CK_IvyBridge, + + /// \name Haswell + /// Haswell microarchitecture based processors. + CK_Haswell, + + /// \name Broadwell + /// Broadwell microarchitecture based processors. CK_Broadwell, - //@} + + /// \name Skylake + /// Skylake microarchitecture based processors. + CK_Skylake, /// \name Knights Landing /// Knights Landing processor. CK_KNL, - /// \name Skylake Server - /// Skylake server processor. - CK_SKX, - /// \name K6 /// K6 architecture processors. //@{ @@ -2026,15 +2040,23 @@ public: .Case("nocona", CK_Nocona) .Case("core2", CK_Core2) .Case("penryn", CK_Penryn) - .Case("atom", CK_Atom) - .Case("slm", CK_Silvermont) - .Case("corei7", CK_Corei7) - .Case("corei7-avx", CK_Corei7AVX) - .Case("core-avx-i", CK_CoreAVXi) - .Case("core-avx2", CK_CoreAVX2) + .Case("bonnell", CK_Bonnell) + .Case("atom", CK_Bonnell) // Legacy name. + .Case("silvermont", CK_Silvermont) + .Case("slm", CK_Silvermont) // Legacy name. + .Case("nehalem", CK_Nehalem) + .Case("corei7", CK_Nehalem) // Legacy name. + .Case("westmere", CK_Westmere) + .Case("sandybridge", CK_SandyBridge) + .Case("corei7-avx", CK_SandyBridge) // Legacy name. + .Case("ivybridge", CK_IvyBridge) + .Case("core-avx-i", CK_IvyBridge) // Legacy name. + .Case("haswell", CK_Haswell) + .Case("core-avx2", CK_Haswell) // Legacy name. .Case("broadwell", CK_Broadwell) + .Case("skylake", CK_Skylake) + .Case("skx", CK_Skylake) // Legacy name. .Case("knl", CK_KNL) - .Case("skx", CK_SKX) .Case("k6", CK_K6) .Case("k6-2", CK_K6_2) .Case("k6-3", CK_K6_3) @@ -2050,6 +2072,7 @@ public: .Case("k8-sse3", CK_K8SSE3) .Case("opteron", CK_Opteron) .Case("opteron-sse3", CK_OpteronSSE3) + .Case("barcelona", CK_AMDFAM10) .Case("amdfam10", CK_AMDFAM10) .Case("btver1", CK_BTVER1) .Case("btver2", CK_BTVER2) @@ -2106,15 +2129,16 @@ public: case CK_Nocona: case CK_Core2: case CK_Penryn: - case CK_Atom: + case CK_Bonnell: case CK_Silvermont: - case CK_Corei7: - case CK_Corei7AVX: - case CK_CoreAVXi: - case CK_CoreAVX2: + case CK_Nehalem: + case CK_Westmere: + case CK_SandyBridge: + case CK_IvyBridge: + case CK_Haswell: case CK_Broadwell: + case CK_Skylake: case CK_KNL: - case CK_SKX: case CK_Athlon64: case CK_Athlon64SSE3: case CK_AthlonFX: @@ -2205,7 +2229,7 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { setFeatureEnabledImpl(Features, "cx16", true); break; case CK_Core2: - case CK_Atom: + case CK_Bonnell: setFeatureEnabledImpl(Features, "ssse3", true); setFeatureEnabledImpl(Features, "cx16", true); break; @@ -2213,7 +2237,7 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { setFeatureEnabledImpl(Features, "sse4.1", true); setFeatureEnabledImpl(Features, "cx16", true); break; - case CK_SKX: + case CK_Skylake: setFeatureEnabledImpl(Features, "avx512f", true); setFeatureEnabledImpl(Features, "avx512cd", true); setFeatureEnabledImpl(Features, "avx512dq", true); @@ -2224,7 +2248,7 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { setFeatureEnabledImpl(Features, "rdseed", true); setFeatureEnabledImpl(Features, "adx", true); // FALLTHROUGH - case CK_CoreAVX2: + case CK_Haswell: setFeatureEnabledImpl(Features, "avx2", true); setFeatureEnabledImpl(Features, "lzcnt", true); setFeatureEnabledImpl(Features, "bmi", true); @@ -2232,19 +2256,20 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { setFeatureEnabledImpl(Features, "rtm", true); setFeatureEnabledImpl(Features, "fma", true); // FALLTHROUGH - case CK_CoreAVXi: + case CK_IvyBridge: setFeatureEnabledImpl(Features, "rdrnd", true); setFeatureEnabledImpl(Features, "f16c", true); setFeatureEnabledImpl(Features, "fsgsbase", true); // FALLTHROUGH - case CK_Corei7AVX: + case CK_SandyBridge: setFeatureEnabledImpl(Features, "avx", true); // FALLTHROUGH + case CK_Westmere: case CK_Silvermont: setFeatureEnabledImpl(Features, "aes", true); setFeatureEnabledImpl(Features, "pclmul", true); // FALLTHROUGH - case CK_Corei7: + case CK_Nehalem: setFeatureEnabledImpl(Features, "sse4.2", true); setFeatureEnabledImpl(Features, "cx16", true); break; @@ -2787,25 +2812,33 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts, case CK_Penryn: defineCPUMacros(Builder, "core2"); break; - case CK_Atom: + case CK_Bonnell: defineCPUMacros(Builder, "atom"); break; case CK_Silvermont: defineCPUMacros(Builder, "slm"); break; - case CK_Corei7: - case CK_Corei7AVX: - case CK_CoreAVXi: - case CK_CoreAVX2: + case CK_Nehalem: + case CK_Westmere: + case CK_SandyBridge: + case CK_IvyBridge: + case CK_Haswell: case CK_Broadwell: + // FIXME: Historically, we defined this legacy name, it would be nice to + // remove it at some point. We've never exposed fine-grained names for + // recent primary x86 CPUs, and we should keep it that way. defineCPUMacros(Builder, "corei7"); break; + case CK_Skylake: + // FIXME: Historically, we defined this legacy name, it would be nice to + // remove it at some point. This is the only fine-grained CPU macro in the + // main intel CPU line, and it would be better to not have these and force + // people to use ISA macros. + defineCPUMacros(Builder, "skx"); + break; case CK_KNL: defineCPUMacros(Builder, "knl"); break; - case CK_SKX: - defineCPUMacros(Builder, "skx"); - break; case CK_K6_2: Builder.defineMacro("__k6_2__"); Builder.defineMacro("__tune_k6_2__"); diff --git a/clang/test/Driver/x86-march.c b/clang/test/Driver/x86-march.c new file mode 100644 index 00000000000..fd6e30b0159 --- /dev/null +++ b/clang/test/Driver/x86-march.c @@ -0,0 +1,105 @@ +// Ensure we support the various CPU architecture names. +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=nocona 2>&1 \ +// RUN: | FileCheck %s -check-prefix=nocona +// nocona: "-target-cpu" "nocona" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=core2 2>&1 \ +// RUN: | FileCheck %s -check-prefix=core2 +// core2: "-target-cpu" "core2" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=penryn 2>&1 \ +// RUN: | FileCheck %s -check-prefix=penryn +// penryn: "-target-cpu" "penryn" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=nehalem 2>&1 \ +// RUN: | FileCheck %s -check-prefix=nehalem +// nehalem: "-target-cpu" "nehalem" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=westmere 2>&1 \ +// RUN: | FileCheck %s -check-prefix=westmere +// westmere: "-target-cpu" "westmere" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=sandybridge 2>&1 \ +// RUN: | FileCheck %s -check-prefix=sandybridge +// sandybridge: "-target-cpu" "sandybridge" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=ivybridge 2>&1 \ +// RUN: | FileCheck %s -check-prefix=ivybridge +// ivybridge: "-target-cpu" "ivybridge" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=haswell 2>&1 \ +// RUN: | FileCheck %s -check-prefix=haswell +// haswell: "-target-cpu" "haswell" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=broadwell 2>&1 \ +// RUN: | FileCheck %s -check-prefix=broadwell +// broadwell: "-target-cpu" "broadwell" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bonnell 2>&1 \ +// RUN: | FileCheck %s -check-prefix=bonnell +// bonnell: "-target-cpu" "bonnell" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=silvermont 2>&1 \ +// RUN: | FileCheck %s -check-prefix=silvermont +// silvermont: "-target-cpu" "silvermont" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=k8 2>&1 \ +// RUN: | FileCheck %s -check-prefix=k8 +// k8: "-target-cpu" "k8" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=opteron 2>&1 \ +// RUN: | FileCheck %s -check-prefix=opteron +// opteron: "-target-cpu" "opteron" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=athlon64 2>&1 \ +// RUN: | FileCheck %s -check-prefix=athlon64 +// athlon64: "-target-cpu" "athlon64" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=athlon-fx 2>&1 \ +// RUN: | FileCheck %s -check-prefix=athlon-fx +// athlon-fx: "-target-cpu" "athlon-fx" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=k8-sse3 2>&1 \ +// RUN: | FileCheck %s -check-prefix=k8-sse3 +// k8-sse3: "-target-cpu" "k8-sse3" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=opteron-sse3 2>&1 \ +// RUN: | FileCheck %s -check-prefix=opteron-sse3 +// opteron-sse3: "-target-cpu" "opteron-sse3" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=athlon64-sse3 2>&1 \ +// RUN: | FileCheck %s -check-prefix=athlon64-sse3 +// athlon64-sse3: "-target-cpu" "athlon64-sse3" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=amdfam10 2>&1 \ +// RUN: | FileCheck %s -check-prefix=amdfam10 +// amdfam10: "-target-cpu" "amdfam10" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=barcelona 2>&1 \ +// RUN: | FileCheck %s -check-prefix=barcelona +// barcelona: "-target-cpu" "barcelona" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bdver1 2>&1 \ +// RUN: | FileCheck %s -check-prefix=bdver1 +// bdver1: "-target-cpu" "bdver1" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bdver2 2>&1 \ +// RUN: | FileCheck %s -check-prefix=bdver2 +// bdver2: "-target-cpu" "bdver2" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bdver3 2>&1 \ +// RUN: | FileCheck %s -check-prefix=bdver3 +// bdver3: "-target-cpu" "bdver3" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=bdver4 2>&1 \ +// RUN: | FileCheck %s -check-prefix=bdver4 +// bdver4: "-target-cpu" "bdver4" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=btver1 2>&1 \ +// RUN: | FileCheck %s -check-prefix=btver1 +// btver1: "-target-cpu" "btver1" +// +// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=btver2 2>&1 \ +// RUN: | FileCheck %s -check-prefix=btver2 +// btver2: "-target-cpu" "btver2" diff --git a/clang/test/Frontend/x86-target-cpu.c b/clang/test/Frontend/x86-target-cpu.c new file mode 100644 index 00000000000..7ca5c75a7c1 --- /dev/null +++ b/clang/test/Frontend/x86-target-cpu.c @@ -0,0 +1,28 @@ +// Ensure we support the various CPU names. +// +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu nocona +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu core2 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu penryn +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu nehalem +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu westmere +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu sandybridge +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu ivybridge +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu haswell +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu broadwell +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu bonnell +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu silvermont +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu k8 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu opteron +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu athlon64 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu athlon-fx +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu k8-sse3 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu opteron-sse3 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu athlon64-sse3 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu amdfam10 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu barcelona +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu bdver1 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu bdver2 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu bdver3 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu bdver4 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu btver1 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -S %s -o /dev/null -target-cpu btver2 |
