diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 5 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/x86-32.txt | 6 | ||||
| -rw-r--r-- | llvm/test/MC/X86/x86-32-coverage.s | 8 |
3 files changed, 19 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index fab70e918b8..700a9c0da79 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -1108,6 +1108,11 @@ let hasSideEffects = 0, SchedRW = [WriteZero] in { "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16; def NOOPL : I<0x1f, MRMXm, (outs), (ins i32mem:$zero), "nop{l}\t$zero", [], IIC_NOP>, TB, OpSize32; + // Also allow register so we can assemble/disassemble + def NOOPWr : I<0x1f, MRMXr, (outs), (ins GR16:$zero), + "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16; + def NOOPLr : I<0x1f, MRMXr, (outs), (ins GR32:$zero), + "nop{l}\t$zero", [], IIC_NOP>, TB, OpSize32; } diff --git a/llvm/test/MC/Disassembler/X86/x86-32.txt b/llvm/test/MC/Disassembler/X86/x86-32.txt index 1b865d37bf0..5a09550a708 100644 --- a/llvm/test/MC/Disassembler/X86/x86-32.txt +++ b/llvm/test/MC/Disassembler/X86/x86-32.txt @@ -791,3 +791,9 @@ # CHECK: lwpval $2309737967, (%esp), %edx 0x8f 0xea 0x68 0x12 0x0c 0x24 0xef 0xcd 0xab 0x89 + +# CHECK: nopl %eax +0x0f 0x1f 0xc0 + +# CHECK: nopw %ax +0x66 0x0f 0x1f 0xc0 diff --git a/llvm/test/MC/X86/x86-32-coverage.s b/llvm/test/MC/X86/x86-32-coverage.s index c4f649ff4f4..706039a7a21 100644 --- a/llvm/test/MC/X86/x86-32-coverage.s +++ b/llvm/test/MC/X86/x86-32-coverage.s @@ -2067,6 +2067,14 @@ // CHECK: encoding: [0x0f,0x1f,0x05,0x78,0x56,0x34,0x12] nopl 0x12345678 +// CHECK: nopw %ax +// CHECK: encoding: [0x66,0x0f,0x1f,0xc0] + nopw %ax + +// CHECK: nopl %eax +// CHECK: encoding: [0x0f,0x1f,0xc0] + nopl %eax + // CHECK: nop // CHECK: encoding: [0x90] nop |
