diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 8 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/x86-64.txt | 2 |
2 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 507746218ec..27695eb3562 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -1326,9 +1326,13 @@ def PUSHA16 : I<0x60, RawFrm, (outs), (ins), "pushaw", []>, } let Constraints = "$src = $dst", SchedRW = [WriteALU] in { +// This instruction is a consequence of BSWAP32r observing operand size. The +// encoding is valid, but the behavior is undefined. +let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in +def BSWAP16r_BAD : I<0xC8, AddRegFrm, (outs GR16:$dst), (ins GR16:$src), + "bswap{w}\t$dst", []>, OpSize16, TB; // GR32 = bswap GR32 -def BSWAP32r : I<0xC8, AddRegFrm, - (outs GR32:$dst), (ins GR32:$src), +def BSWAP32r : I<0xC8, AddRegFrm, (outs GR32:$dst), (ins GR32:$src), "bswap{l}\t$dst", [(set GR32:$dst, (bswap GR32:$src))]>, OpSize32, TB; diff --git a/llvm/test/MC/Disassembler/X86/x86-64.txt b/llvm/test/MC/Disassembler/X86/x86-64.txt index e427a798064..312f5a376cb 100644 --- a/llvm/test/MC/Disassembler/X86/x86-64.txt +++ b/llvm/test/MC/Disassembler/X86/x86-64.txt @@ -547,7 +547,7 @@ # CHECK: tpause %r15 0x66 0x41 0x0f 0xae 0xf7 -# CHECK: bswapl %bx +# CHECK: bswapw %bx 0x66 0x0f 0xcb # CHECK: bswapl %ebx |
