diff options
| -rw-r--r-- | llvm/utils/TableGen/CodeGenTarget.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index 18e01c3ec86..88c352d4d8d 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -217,8 +217,7 @@ CodeGenRegBank &CodeGenTarget::getRegBank() const { void CodeGenTarget::ReadRegAltNameIndices() const { RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex"); - array_pod_sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), - LessRecord()); + std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord()); } /// getRegisterByName - If there is a register with the specific AsmName, |
