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-rw-r--r--llvm/include/llvm/CodeGen/MachineBasicBlock.h15
-rw-r--r--llvm/lib/CodeGen/VirtRegMap.cpp11
2 files changed, 19 insertions, 7 deletions
diff --git a/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
index 1440b967aea..118836ecbf6 100644
--- a/llvm/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
@@ -315,9 +315,18 @@ public:
// LiveIn management methods.
- /// addLiveIn - Add the specified register as a live in. Note that it
- /// is an error to add the same register to the same set more than once.
- void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); }
+ /// Adds the specified register as a live in. Note that it is an error to add
+ /// the same register to the same set more than once unless the intention is
+ /// to call sortUniqueLiveIns after all registers are added.
+ void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); }
+
+ /// Sorts and uniques the LiveIns vector. It can be significantly faster to do
+ /// this than repeatedly calling isLiveIn before calling addLiveIn for every
+ /// LiveIn insertion.
+ void sortUniqueLiveIns() {
+ std::sort(LiveIns.begin(), LiveIns.end());
+ LiveIns.erase(std::unique(LiveIns.begin(), LiveIns.end()), LiveIns.end());
+ }
/// Add PhysReg as live in to this block, and ensure that there is a copy of
/// PhysReg to a virtual register of class RC. Return the virtual register
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index d9adfdf7b2e..9fb1b5b65fb 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -264,8 +264,7 @@ void VirtRegRewriter::addMBBLiveIns() {
if ((SubRegLaneMask & S.LaneMask) == 0)
continue;
for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
- if (!LiveIn[i]->isLiveIn(SubReg))
- LiveIn[i]->addLiveIn(SubReg);
+ LiveIn[i]->addLiveIn(SubReg);
}
}
LiveIn.clear();
@@ -277,12 +276,16 @@ void VirtRegRewriter::addMBBLiveIns() {
if (!Indexes->findLiveInMBBs(Seg.start, Seg.end, LiveIn))
continue;
for (unsigned i = 0, e = LiveIn.size(); i != e; ++i)
- if (!LiveIn[i]->isLiveIn(PhysReg))
- LiveIn[i]->addLiveIn(PhysReg);
+ LiveIn[i]->addLiveIn(PhysReg);
LiveIn.clear();
}
}
}
+
+ // Sort and unique MBB LiveIns as we've not checked if SubReg/PhysReg were in
+ // each MBB's LiveIns set before calling addLiveIn on them.
+ for (MachineBasicBlock &MBB : *MF)
+ MBB.sortUniqueLiveIns();
}
void VirtRegRewriter::rewrite() {
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