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-rw-r--r--llvm/lib/CodeGen/MIRParser/MIParser.cpp6
-rw-r--r--llvm/lib/CodeGen/MIRPrinter.cpp1
-rw-r--r--llvm/test/CodeGen/MIR/X86/memory-operands.mir31
3 files changed, 37 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index af599a5cc3b..8874aaedfcf 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -1125,12 +1125,16 @@ bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
if (!V->getType()->isPointerTy())
return error("expected a pointer IR value");
lex();
+ int64_t Offset = 0;
+ if (parseOffset(Offset))
+ return true;
// TODO: Parse the base alignment.
// TODO: Parse the attached metadata nodes.
if (expectAndConsume(MIToken::rparen))
return true;
- Dest = MF.getMachineMemOperand(MachinePointerInfo(V), Flags, Size, Size);
+ Dest =
+ MF.getMachineMemOperand(MachinePointerInfo(V, Offset), Flags, Size, Size);
return false;
}
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index e162a8f73e2..4710f168d3a 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -678,6 +678,7 @@ void MIPrinter::print(const MachineMemOperand &Op) {
if (const Value *Val = Op.getValue())
printIRValueReference(*Val);
// TODO: Print PseudoSourceValue.
+ printOffset(Op.getOffset());
// TODO: Print the base alignment.
// TODO: Print the metadata attributes.
OS << ')';
diff --git a/llvm/test/CodeGen/MIR/X86/memory-operands.mir b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
index 54e9cc47ba0..9e96516d55f 100644
--- a/llvm/test/CodeGen/MIR/X86/memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
@@ -43,6 +43,14 @@
!1 = !{}
+ define void @memory_offset(<8 x float>* %vec) {
+ entry:
+ %v = load <8 x float>, <8 x float>* %vec
+ %v2 = insertelement <8 x float> %v, float 0.0, i32 4
+ store <8 x float> %v2, <8 x float>* %vec
+ ret void
+ }
+
...
---
name: test
@@ -123,3 +131,26 @@ body:
- '%eax = MOV32rm killed %rdi, 1, _, 0, _ :: (invariant load 4 from %ir.x)'
- 'RETQ %eax'
...
+---
+name: memory_offset
+tracksRegLiveness: true
+liveins:
+ - { reg: '%rdi' }
+body:
+ - id: 0
+ name: entry
+ liveins: [ '%rdi' ]
+ instructions:
+# CHECK: name: memory_offset
+# CHECK: %xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec)
+# CHECK-NEXT: %xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16)
+# CHECK: MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec)
+# CHECK-NEXT: MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16)
+ - '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec)'
+ - '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16)'
+ - '%xmm2 = FsFLD0SS'
+ - '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2'
+ - 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec)'
+ - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16)'
+ - RETQ
+...
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