diff options
| -rw-r--r-- | clang/lib/CodeGen/CGCall.cpp | 5 | ||||
| -rw-r--r-- | clang/test/CodeGen/arm64-be-bitfield.c | 9 |
2 files changed, 12 insertions, 2 deletions
diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp index da504739836..972a7c8dbb7 100644 --- a/clang/lib/CodeGen/CGCall.cpp +++ b/clang/lib/CodeGen/CGCall.cpp @@ -700,8 +700,9 @@ static llvm::Value *CoerceIntOrPtrToIntOrPtr(llvm::Value *Val, if (DL.isBigEndian()) { // Preserve the high bits on big-endian targets. // That is what memory coercion does. - uint64_t SrcSize = DL.getTypeAllocSizeInBits(Val->getType()); - uint64_t DstSize = DL.getTypeAllocSizeInBits(DestIntTy); + uint64_t SrcSize = DL.getTypeSizeInBits(Val->getType()); + uint64_t DstSize = DL.getTypeSizeInBits(DestIntTy); + if (SrcSize > DstSize) { Val = CGF.Builder.CreateLShr(Val, SrcSize - DstSize, "coerce.highbits"); Val = CGF.Builder.CreateTrunc(Val, DestIntTy, "coerce.val.ii"); diff --git a/clang/test/CodeGen/arm64-be-bitfield.c b/clang/test/CodeGen/arm64-be-bitfield.c new file mode 100644 index 00000000000..f563596bdda --- /dev/null +++ b/clang/test/CodeGen/arm64-be-bitfield.c @@ -0,0 +1,9 @@ +// RUN: %clang_cc1 -triple arm64_be-linux-gnu -ffreestanding -emit-llvm -O0 -o - %s | FileCheck %s + +struct bt3 { signed b2:10; signed b3:10; } b16; + +// The correct right-shift amount is 40 bits for big endian. +signed callee_b0f(struct bt3 bp11) { +// CHECK: = lshr i64 %{{.*}}, 40 + return bp11.b2; +} |
