diff options
| -rw-r--r-- | llvm/test/tools/llvm-exegesis/X86/latency-CMOV32rr.s | 9 | ||||
| -rw-r--r-- | llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp | 31 | ||||
| -rw-r--r-- | llvm/tools/llvm-exegesis/lib/SnippetGenerator.h | 3 | ||||
| -rw-r--r-- | llvm/tools/llvm-exegesis/lib/Target.cpp | 24 | ||||
| -rw-r--r-- | llvm/tools/llvm-exegesis/lib/Target.h | 8 | ||||
| -rw-r--r-- | llvm/tools/llvm-exegesis/lib/X86/Target.cpp | 21 |
6 files changed, 69 insertions, 27 deletions
diff --git a/llvm/test/tools/llvm-exegesis/X86/latency-CMOV32rr.s b/llvm/test/tools/llvm-exegesis/X86/latency-CMOV32rr.s new file mode 100644 index 00000000000..d983c2b0613 --- /dev/null +++ b/llvm/test/tools/llvm-exegesis/X86/latency-CMOV32rr.s @@ -0,0 +1,9 @@ +# RUN: llvm-exegesis -mode=latency -opcode-name=CMOV32rr | FileCheck %s + +CHECK: --- +CHECK-NEXT: mode: latency +CHECK-NEXT: key: +CHECK-NEXT: instructions: +CHECK-NEXT: CMOV32rr +CHECK-NEXT: config: '' +CHECK-LAST: ... diff --git a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp index 44592fd89a3..8cbde9f0186 100644 --- a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp +++ b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp @@ -12,6 +12,7 @@ #include "Assembler.h" #include "MCInstrDescView.h" #include "SnippetGenerator.h" +#include "Target.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/StringRef.h" #include "llvm/ADT/Twine.h" @@ -50,7 +51,7 @@ SnippetGenerator::generateConfigurations(const Instruction &Instr) const { BenchmarkCode BC; BC.Info = CT.Info; for (InstructionTemplate &IT : CT.Instructions) { - randomizeUnsetVariables(ForbiddenRegs, IT); + randomizeUnsetVariables(State.getExegesisTarget(), ForbiddenRegs, IT); BC.Instructions.push_back(IT.build()); } if (CT.ScratchSpacePointerInReg) @@ -156,29 +157,6 @@ static auto randomElement(const C &Container) -> decltype(Container[0]) { return Container[randomIndex(Container.size())]; } -static void randomize(const Instruction &Instr, const Variable &Var, - llvm::MCOperand &AssignedValue, - const llvm::BitVector &ForbiddenRegs) { - const Operand &Op = Instr.getPrimaryOperand(Var); - switch (Op.getExplicitOperandInfo().OperandType) { - case llvm::MCOI::OperandType::OPERAND_IMMEDIATE: - // FIXME: explore immediate values too. - AssignedValue = llvm::MCOperand::createImm(1); - break; - case llvm::MCOI::OperandType::OPERAND_REGISTER: { - assert(Op.isReg()); - auto AllowedRegs = Op.getRegisterAliasing().sourceBits(); - assert(AllowedRegs.size() == ForbiddenRegs.size()); - for (auto I : ForbiddenRegs.set_bits()) - AllowedRegs.reset(I); - AssignedValue = llvm::MCOperand::createReg(randomBit(AllowedRegs)); - break; - } - default: - break; - } -} - static void setRegisterOperandValue(const RegisterOperandAssignment &ROV, InstructionTemplate &IB) { assert(ROV.Op); @@ -212,12 +190,13 @@ void setRandomAliasing(const AliasingConfigurations &AliasingConfigurations, setRegisterOperandValue(randomElement(RandomConf.Uses), UseIB); } -void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs, +void randomizeUnsetVariables(const ExegesisTarget &Target, + const llvm::BitVector &ForbiddenRegs, InstructionTemplate &IT) { for (const Variable &Var : IT.Instr.Variables) { llvm::MCOperand &AssignedValue = IT.getValueFor(Var); if (!AssignedValue.isValid()) - randomize(IT.Instr, Var, AssignedValue, ForbiddenRegs); + Target.randomizeMCOperand(IT.Instr, Var, AssignedValue, ForbiddenRegs); } } diff --git a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.h b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.h index a07bc6981ae..289fa02096a 100644 --- a/llvm/tools/llvm-exegesis/lib/SnippetGenerator.h +++ b/llvm/tools/llvm-exegesis/lib/SnippetGenerator.h @@ -88,7 +88,8 @@ void setRandomAliasing(const AliasingConfigurations &AliasingConfigurations, // Assigns a Random Value to all Variables in IT that are still Invalid. // Do not use any of the registers in `ForbiddenRegs`. -void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs, +void randomizeUnsetVariables(const ExegesisTarget &Target, + const llvm::BitVector &ForbiddenRegs, InstructionTemplate &IT); } // namespace exegesis diff --git a/llvm/tools/llvm-exegesis/lib/Target.cpp b/llvm/tools/llvm-exegesis/lib/Target.cpp index c662f1f5566..945aabb8a3f 100644 --- a/llvm/tools/llvm-exegesis/lib/Target.cpp +++ b/llvm/tools/llvm-exegesis/lib/Target.cpp @@ -86,6 +86,30 @@ ExegesisTarget::createUopsBenchmarkRunner(const LLVMState &State) const { return llvm::make_unique<UopsBenchmarkRunner>(State); } +void ExegesisTarget::randomizeMCOperand( + const Instruction &Instr, const Variable &Var, + llvm::MCOperand &AssignedValue, + const llvm::BitVector &ForbiddenRegs) const { + const Operand &Op = Instr.getPrimaryOperand(Var); + switch (Op.getExplicitOperandInfo().OperandType) { + case llvm::MCOI::OperandType::OPERAND_IMMEDIATE: + // FIXME: explore immediate values too. + AssignedValue = llvm::MCOperand::createImm(1); + break; + case llvm::MCOI::OperandType::OPERAND_REGISTER: { + assert(Op.isReg()); + auto AllowedRegs = Op.getRegisterAliasing().sourceBits(); + assert(AllowedRegs.size() == ForbiddenRegs.size()); + for (auto I : ForbiddenRegs.set_bits()) + AllowedRegs.reset(I); + AssignedValue = llvm::MCOperand::createReg(randomBit(AllowedRegs)); + break; + } + default: + break; + } +} + static_assert(std::is_pod<PfmCountersInfo>::value, "We shouldn't have dynamic initialization here"); const PfmCountersInfo PfmCountersInfo::Default = {nullptr, nullptr, nullptr, diff --git a/llvm/tools/llvm-exegesis/lib/Target.h b/llvm/tools/llvm-exegesis/lib/Target.h index ab760bfa820..0c574780865 100644 --- a/llvm/tools/llvm-exegesis/lib/Target.h +++ b/llvm/tools/llvm-exegesis/lib/Target.h @@ -102,6 +102,14 @@ public: // matter as long as it's large enough. virtual unsigned getMaxMemoryAccessSize() const { return 0; } + // Assigns a random operand of the right type to variable Var. + // The default implementation only handles generic operand types. + // The target is responsible for handling any operand + // starting from OPERAND_FIRST_TARGET. + virtual void randomizeMCOperand(const Instruction &Instr, const Variable &Var, + llvm::MCOperand &AssignedValue, + const llvm::BitVector &ForbiddenRegs) const; + // Creates a snippet generator for the given mode. std::unique_ptr<SnippetGenerator> createSnippetGenerator(InstructionBenchmark::ModeE Mode, diff --git a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp index 6ef1953352f..01e3589cc2d 100644 --- a/llvm/tools/llvm-exegesis/lib/X86/Target.cpp +++ b/llvm/tools/llvm-exegesis/lib/X86/Target.cpp @@ -433,6 +433,10 @@ private: unsigned getMaxMemoryAccessSize() const override { return 64; } + void randomizeMCOperand(const Instruction &Instr, const Variable &Var, + llvm::MCOperand &AssignedValue, + const llvm::BitVector &ForbiddenRegs) const override; + void fillMemoryOperands(InstructionTemplate &IT, unsigned Reg, unsigned Offset) const override; @@ -485,6 +489,23 @@ ExegesisX86Target::getScratchMemoryRegister(const llvm::Triple &TT) const { return TT.isOSWindows() ? llvm::X86::RCX : llvm::X86::RDI; } +void ExegesisX86Target::randomizeMCOperand( + const Instruction &Instr, const Variable &Var, + llvm::MCOperand &AssignedValue, + const llvm::BitVector &ForbiddenRegs) const { + ExegesisTarget::randomizeMCOperand(Instr, Var, AssignedValue, ForbiddenRegs); + + const Operand &Op = Instr.getPrimaryOperand(Var); + switch (Op.getExplicitOperandInfo().OperandType) { + case llvm::X86::OperandType::OPERAND_COND_CODE: + // FIXME: explore all CC variants. + AssignedValue = llvm::MCOperand::createImm(1); + break; + default: + break; + } +} + void ExegesisX86Target::fillMemoryOperands(InstructionTemplate &IT, unsigned Reg, unsigned Offset) const { |

