diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 10 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/unwind-fp.ll | 15 |
2 files changed, 22 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp index 17dd7ee7b81..b7cd3a0c2da 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp @@ -1071,10 +1071,12 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) { MCTargetStreamer &TS = *OutStreamer->getTargetStreamer(); ARMTargetStreamer &ATS = static_cast<ARMTargetStreamer &>(TS); const MachineFunction &MF = *MI->getParent()->getParent(); - const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); + const TargetRegisterInfo *TargetRegInfo = + MF.getSubtarget().getRegisterInfo(); + const MachineRegisterInfo &MachineRegInfo = MF.getRegInfo(); const ARMFunctionInfo &AFI = *MF.getInfo<ARMFunctionInfo>(); - unsigned FramePtr = RegInfo->getFrameRegister(MF); + unsigned FramePtr = TargetRegInfo->getFrameRegister(MF); unsigned Opc = MI->getOpcode(); unsigned SrcReg, DstReg; @@ -1131,7 +1133,9 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) { if (MO.isUndef()) { assert(RegList.empty() && "Pad registers must come before restored ones"); - Pad += 4; + unsigned Width = + TargetRegInfo->getRegSizeInBits(MO.getReg(), MachineRegInfo) / 8; + Pad += Width; continue; } RegList.push_back(MO.getReg()); diff --git a/llvm/test/CodeGen/ARM/unwind-fp.ll b/llvm/test/CodeGen/ARM/unwind-fp.ll new file mode 100644 index 00000000000..e655bbbb659 --- /dev/null +++ b/llvm/test/CodeGen/ARM/unwind-fp.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -mtriple=armv7a-arm-none-eabi | FileCheck %s + +target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" +target triple = "armv7-arm-none-eabi" + +define void @foo() minsize { +entry: + ; CHECK: .vsave {[[SAVE_REG:d[0-9]+]]} + ; CHECK-NEXT: .pad #8 + ; CHECK-NEXT: vpush {[[PAD_REG:d[0-9]+]], [[SAVE_REG]]} + ; CHECK: vpop {[[PAD_REG]], [[SAVE_REG]]} + %a = alloca i32, align 4 + call void asm sideeffect "", "r,~{d8}"(i32* %a) + ret void +} |
