diff options
| author | Craig Topper <craig.topper@gmail.com> | 2016-07-26 08:06:14 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-07-26 08:06:14 +0000 |
| commit | 26000f8d907bbb97970365b7ea5d3a755ef0201d (patch) | |
| tree | 4e972bed4ecf007728f7b420f1a44b4d25ad40b2 /llvm | |
| parent | f9d897c7a7ad3d44afd19b2ed850478b943d7352 (diff) | |
| download | bcm5719-llvm-26000f8d907bbb97970365b7ea5d3a755ef0201d.tar.gz bcm5719-llvm-26000f8d907bbb97970365b7ea5d3a755ef0201d.zip | |
[AVX512] Don't mark ADDSSZr_Int or MULSSZr_Int as commutable. The intrinsics have one of their arguments indicated as passing through the high bits and we can't commute that.
llvm-svn: 276732
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 0f329543be5..db165f516d9 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -3787,7 +3787,7 @@ multiclass avx512_fp_scalar<bits<8> opc, string OpcodeStr,X86VectorVTInfo _, "$src2, $src1", "$src1, $src2", (VecNode (_.VT _.RC:$src1), (_.VT _.RC:$src2), (i32 FROUND_CURRENT)), - itins.rr, IsCommutable>; + itins.rr>; defm rm_Int : AVX512_maskable_scalar<opc, MRMSrcMem, _, (outs _.RC:$dst), (ins _.RC:$src1, _.ScalarMemOp:$src2), OpcodeStr, @@ -3795,7 +3795,7 @@ multiclass avx512_fp_scalar<bits<8> opc, string OpcodeStr,X86VectorVTInfo _, (VecNode (_.VT _.RC:$src1), (_.VT (scalar_to_vector (_.ScalarLdFrag addr:$src2))), (i32 FROUND_CURRENT)), - itins.rm, IsCommutable>; + itins.rm>; let isCodeGenOnly = 1, isCommutable = IsCommutable, Predicates = [HasAVX512] in { def rr : I< opc, MRMSrcReg, (outs _.FRC:$dst), |
