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authorHal Finkel <hfinkel@anl.gov>2011-12-06 20:55:46 +0000
committerHal Finkel <hfinkel@anl.gov>2011-12-06 20:55:46 +0000
commit0fc34bc2d3a4929f1a5320a0e5aa6ca79e0f67e5 (patch)
tree7292f8dcc13e2db24fc21247bf68bee14d671224 /llvm
parent0702bc1b28bced9b95de52ffbe8df19a897dd19d (diff)
downloadbcm5719-llvm-0fc34bc2d3a4929f1a5320a0e5aa6ca79e0f67e5.tar.gz
bcm5719-llvm-0fc34bc2d3a4929f1a5320a0e5aa6ca79e0f67e5.zip
delaying restore-cr changed assigned registers in some tests
llvm-svn: 145963
Diffstat (limited to 'llvm')
-rw-r--r--llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll6
-rw-r--r--llvm/test/CodeGen/PowerPC/ppc32-vaarg.ll12
2 files changed, 9 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll b/llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
index 3315750b7e1..62fb71a7497 100644
--- a/llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
+++ b/llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
@@ -21,9 +21,9 @@ entry:
return: ; preds = %entry
;CHECK: lis r3, 1
;CHECK: ori r3, r3, 34524
-;CHECK: lwzx r2, r1, r3
-;CHECK: rlwinm r2, r2, 24, 0, 31
-;CHECK: mtcrf 32, r2
+;CHECK: lwzx r3, r1, r3
+;CHECK: rlwinm r3, r3, 24, 0, 31
+;CHECK: mtcrf 32, r3
ret void
}
diff --git a/llvm/test/CodeGen/PowerPC/ppc32-vaarg.ll b/llvm/test/CodeGen/PowerPC/ppc32-vaarg.ll
index c2680fbca3e..05bbd0148d1 100644
--- a/llvm/test/CodeGen/PowerPC/ppc32-vaarg.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc32-vaarg.ll
@@ -52,8 +52,8 @@ define void @ppcvaargtest(%struct.__va_list_tag* %ap) nounwind {
; CHECK-NEXT: slwi 5, 3, 2
; CHECK-NEXT: lwz 6, -16(1)
; CHECK-NEXT: add 5, 6, 5
-; CHECK-NEXT: lwz 0, -36(1)
-; CHECK-NEXT: mtcrf 128, 0
+; CHECK-NEXT: lwz 3, -36(1)
+; CHECK-NEXT: mtcrf 128, 3
; CHECK-NEXT: stw 5, -40(1)
; CHECK-NEXT: blt 0, .LBB0_6
; CHECK-NEXT: # BB#5: # %entry
@@ -97,8 +97,8 @@ define void @ppcvaargtest(%struct.__va_list_tag* %ap) nounwind {
; CHECK-NEXT: lwz 6, -56(1)
; CHECK-NEXT: add 5, 6, 5
; CHECK-NEXT: addi 5, 5, 32
-; CHECK-NEXT: lwz 0, -64(1)
-; CHECK-NEXT: mtcrf 128, 0
+; CHECK-NEXT: lwz 3, -64(1)
+; CHECK-NEXT: mtcrf 128, 3
; CHECK-NEXT: stw 5, -68(1)
; CHECK-NEXT: blt 0, .LBB0_10
; CHECK-NEXT: # BB#9: # %entry
@@ -139,8 +139,8 @@ define void @ppcvaargtest(%struct.__va_list_tag* %ap) nounwind {
; CHECK-NEXT: slwi 5, 3, 2
; CHECK-NEXT: lwz 6, -76(1)
; CHECK-NEXT: add 5, 6, 5
-; CHECK-NEXT: lwz 0, -80(1)
-; CHECK-NEXT: mtcrf 128, 0
+; CHECK-NEXT: lwz 3, -80(1)
+; CHECK-NEXT: mtcrf 128, 3
; CHECK-NEXT: stw 5, -96(1)
; CHECK-NEXT: blt 0, .LBB0_14
; CHECK-NEXT: # BB#13: # %entry
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