Revert r338354 "[ARM] Revert r337821"

Disable ARMCodeGenPrepare by default again. It is causing verifier
failues in V8 that look like:

  Duplicate integer as switch case
  switch i32 %trunc, label %if.end13 [
    i32 0, label %cleanup36
    i32 0, label %if.then8
  ], !dbg !4981
  i32 0
  fatal error: error in backend: Broken function found, compilation aborted!

I will continue reducing the test case and send it along.

llvm-svn: 338452

4 files changed, 12 insertions, 12 deletions

diff --git a/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp b/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp
index 83ba345bf25..24071277427 100644
--- a/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp
+++ b/llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp
@@ -42,7 +42,7 @@
 using namespace llvm;
 
 static cl::opt<bool>
-DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(false),
+DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(true),
            cl::desc("Disable ARM specific CodeGenPrepare pass"));
 
 static cl::opt<bool>
diff --git a/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll b/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll
index 7a5dcae0226..18df13f732e 100644
--- a/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll
+++ b/llvm/test/CodeGen/ARM/arm-cgp-icmps.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
-; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
-; RUN: llc -mtriple=thumbv8 %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
+; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
+; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
+; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
 
 ; CHECK-COMMON-LABEL: test_ult_254_inc_imm:
 ; CHECK-DSP:        adds    r0, #1
diff --git a/llvm/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll b/llvm/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
index d39cc1df18d..8587a907616 100644
--- a/llvm/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
+++ b/llvm/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
-; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
-; RUN: llc -mtriple=thumbv8m.main -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
-; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
+; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
+; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
+; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
+; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
 
 ; Test that ARMCodeGenPrepare can handle:
 ; - loops
diff --git a/llvm/test/CodeGen/ARM/arm-cgp-signed.ll b/llvm/test/CodeGen/ARM/arm-cgp-signed.ll
index 80d5517b95f..7494b57f425 100644
--- a/llvm/test/CodeGen/ARM/arm-cgp-signed.ll
+++ b/llvm/test/CodeGen/ARM/arm-cgp-signed.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv7 %s -o - | FileCheck %s
-; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv7 %s -arm-disable-cgp=false -o - | FileCheck %s
+; RUN: llc -mtriple=armv8 %s -arm-disable-cgp=false -o - | FileCheck %s
 
 ; Test to check that ARMCodeGenPrepare doesn't optimised away sign extends.
 ; CHECK-LABEL: test_signed_load: