diff options
| author | JF Bastien <jfb@google.com> | 2014-08-05 23:27:34 +0000 |
|---|---|---|
| committer | JF Bastien <jfb@google.com> | 2014-08-05 23:27:34 +0000 |
| commit | ac8b66b32c958c69ec1c691db0b563995f8ed8a6 (patch) | |
| tree | 886d9bfe1c3f4878296526a354005fd5e4a2cd6f /llvm | |
| parent | e1a26a624d3612d98af13c47ee43f100bd458199 (diff) | |
| download | bcm5719-llvm-ac8b66b32c958c69ec1c691db0b563995f8ed8a6.tar.gz bcm5719-llvm-ac8b66b32c958c69ec1c691db0b563995f8ed8a6.zip | |
Fix typos in comments and doc
Committing http://reviews.llvm.org/D4798 for Robin Morisset (morisset@google.com)
llvm-svn: 214934
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/docs/TableGen/index.rst | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Transforms/Scalar/GVN.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Transforms/Scalar/LoopRotation.cpp | 4 |
5 files changed, 6 insertions, 6 deletions
diff --git a/llvm/docs/TableGen/index.rst b/llvm/docs/TableGen/index.rst index 0860afa691e..fa76d13f374 100644 --- a/llvm/docs/TableGen/index.rst +++ b/llvm/docs/TableGen/index.rst @@ -292,7 +292,7 @@ Despite being very generic, TableGen has some deficiencies that have been pointed out numerous times. The common theme is that, while TableGen allows you to build Domain-Specific-Languages, the final languages that you create lack the power of other DSLs, which in turn increase considerably the size -and complecity of TableGen files. +and complexity of TableGen files. At the same time, TableGen allows you to create virtually any meaning of the basic concepts via custom-made back-ends, which can pervert the original diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index f88d6f8b2fd..18b3bb25cae 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -16960,7 +16960,7 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N, case ISD::ATOMIC_LOAD_UMIN: case ISD::ATOMIC_LOAD_UMAX: // Delegate to generic TypeLegalization. Situations we can really handle - // should have already been dealt with by X86AtomicExpand.cpp. + // should have already been dealt with by X86AtomicExpandPass.cpp. break; case ISD::ATOMIC_LOAD: { ReplaceATOMIC_LOAD(N, Results, DAG); diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index bf0546ea0c1..36ee4a2d26b 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -3145,7 +3145,7 @@ void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB, // Moving EFLAGS to / from another register requires a push and a pop. // Notice that we have to adjust the stack if we don't want to clobber the - // first frame index. See X86FrameLowering.cpp - colobbersTheStack. + // first frame index. See X86FrameLowering.cpp - clobbersTheStack. if (SrcReg == X86::EFLAGS) { if (X86::GR64RegClass.contains(DestReg)) { BuildMI(MBB, MI, DL, get(X86::PUSHF64)); diff --git a/llvm/lib/Transforms/Scalar/GVN.cpp b/llvm/lib/Transforms/Scalar/GVN.cpp index 7135874003d..07be4955cb4 100644 --- a/llvm/lib/Transforms/Scalar/GVN.cpp +++ b/llvm/lib/Transforms/Scalar/GVN.cpp @@ -2817,7 +2817,7 @@ bool GVN::processFoldableCondBr(BranchInst *BI) { return true; } -// performPRE() will trigger assert if it come across an instruciton without +// performPRE() will trigger assert if it comes across an instruction without // associated val-num. As it normally has far more live instructions than dead // instructions, it makes more sense just to "fabricate" a val-number for the // dead code than checking if instruction involved is dead or not. diff --git a/llvm/lib/Transforms/Scalar/LoopRotation.cpp b/llvm/lib/Transforms/Scalar/LoopRotation.cpp index 2ce58314f8e..71f01f40f87 100644 --- a/llvm/lib/Transforms/Scalar/LoopRotation.cpp +++ b/llvm/lib/Transforms/Scalar/LoopRotation.cpp @@ -184,7 +184,7 @@ static void RewriteUsesOfClonedInstructions(BasicBlock *OrigHeader, } } -/// Determine whether the instructions in this range my be safely and cheaply +/// Determine whether the instructions in this range may be safely and cheaply /// speculated. This is not an important enough situation to develop complex /// heuristics. We handle a single arithmetic instruction along with any type /// conversions. @@ -232,7 +232,7 @@ static bool shouldSpeculateInstrs(BasicBlock::iterator Begin, /// Fold the loop tail into the loop exit by speculating the loop tail /// instructions. Typically, this is a single post-increment. In the case of a /// simple 2-block loop, hoisting the increment can be much better than -/// duplicating the entire loop header. In the cast of loops with early exits, +/// duplicating the entire loop header. In the case of loops with early exits, /// rotation will not work anyway, but simplifyLoopLatch will put the loop in /// canonical form so downstream passes can handle it. /// |

