diff options
| author | Michael Liao <michael.hliao@gmail.com> | 2019-12-25 00:47:18 -0500 |
|---|---|---|
| committer | Michael Liao <michael.hliao@gmail.com> | 2019-12-31 14:20:30 -0500 |
| commit | 79d401905fcf519da732b33ee9dffd18f2da3b10 (patch) | |
| tree | 024a0c698c9f580225706a9580d2883ae2f51cc4 /llvm | |
| parent | 8be5a0fe12bb9114bb82986b1dcb9205699aa085 (diff) | |
| download | bcm5719-llvm-79d401905fcf519da732b33ee9dffd18f2da3b10.tar.gz bcm5719-llvm-79d401905fcf519da732b33ee9dffd18f2da3b10.zip | |
[amdgpu] Fix scoreboard updating on `s_waitcnt_vscnt`.
Summary: - Other counters are accidentally cleared.
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71866
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir | 17 |
2 files changed, 18 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp index bfeaebde386..927826c5240 100644 --- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp +++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp @@ -1081,7 +1081,7 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore( assert(II->getOpcode() == AMDGPU::S_WAITCNT_VSCNT); assert(II->getOperand(0).getReg() == AMDGPU::SGPR_NULL); ScoreBrackets.applyWaitcnt( - AMDGPU::Waitcnt(0, 0, 0, II->getOperand(1).getImm())); + AMDGPU::Waitcnt(~0u, ~0u, ~0u, II->getOperand(1).getImm())); } } } diff --git a/llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir b/llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir new file mode 100644 index 00000000000..e9d8ebe4d80 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir @@ -0,0 +1,17 @@ +# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass si-insert-waitcnts -o - %s | FileCheck -check-prefix=GFX10 %s + +# GFX10-LABEL: waitcnt-vscnt +# GFX10: GLOBAL_ATOMIC_ADD_RTN +# GFX10-NEXT: S_WAITCNT 49279 +--- +name: waitcnt-vscnt +machineFunctionInfo: + isEntryFunction: true +body: | + bb.0: + liveins: $sgpr0_sgpr1 + $sgpr4 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 4, 0, 0 :: (dereferenceable invariant load 4 from `i32 addrspace(4)* undef`) + S_WAITCNT_VSCNT undef $sgpr_null, 0 + $vgpr0 = GLOBAL_ATOMIC_ADD_RTN $vgpr0_vgpr1, $vgpr2, 0, 0, implicit $exec :: (load store syncscope("agent") seq_cst 4, addrspace 1) + S_CMP_LG_U32 killed $sgpr4, 0, implicit-def $scc +... |

