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authorKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2017-03-20 18:06:45 +0000
committerKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2017-03-20 18:06:45 +0000
commit2534bc07f47080d9d6d66ff8e7efd84c412e3711 (patch)
tree3b5fde985089e3cfc6a73bd68f7f364ae2d2dca8 /llvm
parentfa42a23cfcbd8406f7c000cb0ea400cd165e6db1 (diff)
downloadbcm5719-llvm-2534bc07f47080d9d6d66ff8e7efd84c412e3711.tar.gz
bcm5719-llvm-2534bc07f47080d9d6d66ff8e7efd84c412e3711.zip
[AMDGPU] Run always inliner early in opt
Differential Revision: https://reviews.llvm.org/D31141 llvm-svn: 298281
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp1
-rw-r--r--llvm/test/CodeGen/AMDGPU/early-inline-alias.ll12
-rw-r--r--llvm/test/CodeGen/AMDGPU/early-inline.ll21
3 files changed, 34 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 914217af73b..1b25eb4fe3b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -252,6 +252,7 @@ void AMDGPUTargetMachine::adjustPassManager(PassManagerBuilder &Builder) {
return !GV.use_empty();
}));
PM.add(createGlobalDCEPass());
+ PM.add(createAMDGPUAlwaysInlinePass());
}
});
}
diff --git a/llvm/test/CodeGen/AMDGPU/early-inline-alias.ll b/llvm/test/CodeGen/AMDGPU/early-inline-alias.ll
new file mode 100644
index 00000000000..42dfa4e7ab4
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/early-inline-alias.ll
@@ -0,0 +1,12 @@
+; RUN: opt -mtriple=amdgcn-- -O1 -S -inline-threshold=1 %s | FileCheck %s
+
+; CHECK: @add1alias = alias i32 (i32), i32 (i32)* @add1
+; CHECK: @add1alias2 = alias i32 (i32), i32 (i32)* @add1
+
+@add1alias = alias i32 (i32), i32 (i32)* @add1
+@add1alias2 = alias i32 (i32), i32 (i32)* @add1
+
+define i32 @add1(i32) {
+ %2 = add nsw i32 %0, 1
+ ret i32 %2
+}
diff --git a/llvm/test/CodeGen/AMDGPU/early-inline.ll b/llvm/test/CodeGen/AMDGPU/early-inline.ll
new file mode 100644
index 00000000000..8395ad818ab
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/early-inline.ll
@@ -0,0 +1,21 @@
+; RUN: opt -mtriple=amdgcn-- -O1 -S -inline-threshold=1 -amdgpu-internalize-symbols %s | FileCheck %s
+
+define i32 @callee(i32 %x) {
+entry:
+ %mul1 = mul i32 %x, %x
+ %mul2 = mul i32 %mul1, %x
+ %mul3 = mul i32 %mul1, %mul2
+ %mul4 = mul i32 %mul3, %mul2
+ %mul5 = mul i32 %mul4, %mul3
+ ret i32 %mul5
+}
+
+; CHECK-LABEL: @caller
+; CHECK: mul i32
+; CHECK-NOT: call i32
+
+define amdgpu_kernel i32 @caller(i32 %x) {
+entry:
+ %res = call i32 @callee(i32 %x)
+ ret i32 %res
+}
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