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| author | Craig Topper <craig.topper@intel.com> | 2018-06-12 07:32:18 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-06-12 07:32:18 +0000 |
| commit | 4cdb153ddea4a1e6dc8964ac09f1bac081bde616 (patch) | |
| tree | 88475b09cd67cd493349f84eac69930ed8bac4bd /llvm/utils/TableGen/X86FoldTablesEmitter.cpp | |
| parent | 5799e4df75def686114397a49815f5508786d4c4 (diff) | |
| download | bcm5719-llvm-4cdb153ddea4a1e6dc8964ac09f1bac081bde616.tar.gz bcm5719-llvm-4cdb153ddea4a1e6dc8964ac09f1bac081bde616.zip | |
[X86] Don't add stores to the autogenerated load folding tables if the register and memory operands have different widths.
This can cause the amount of the memory written to be changed which would be bad.
llvm-svn: 334480
Diffstat (limited to 'llvm/utils/TableGen/X86FoldTablesEmitter.cpp')
| -rw-r--r-- | llvm/utils/TableGen/X86FoldTablesEmitter.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp index 6ef339b7a2f..190ad6caa31 100644 --- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp +++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp @@ -562,7 +562,8 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInstr, // MOVAPSmr => (outs), (ins f128mem:$dst, VR128:$src) Record *RegOpRec = RegInstr->Operands[RegOutSize - 1].Rec; Record *MemOpRec = MemInstr->Operands[RegOutSize - 1].Rec; - if (isRegisterOperand(RegOpRec) && isMemoryOperand(MemOpRec)) + if (isRegisterOperand(RegOpRec) && isMemoryOperand(MemOpRec) && + getRegOperandSize(RegOpRec) == getMemOperandSize(MemOpRec)) addEntryWithFlags(Table0, RegInstr, MemInstr, S, 0); } |
