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authorCraig Topper <craig.topper@gmail.com>2014-03-05 05:17:42 +0000
committerCraig Topper <craig.topper@gmail.com>2014-03-05 05:17:42 +0000
commit716b0730c1a287e19c474243e2ae57ecdd136be2 (patch)
tree4215368ebbfb8aa5331ec3d0814c8d2290b78dbb /llvm/utils/TableGen/CodeGenSchedule.cpp
parent9f584e67f4258dbcce982dba84c4aeda3c0e4617 (diff)
downloadbcm5719-llvm-716b0730c1a287e19c474243e2ae57ecdd136be2.tar.gz
bcm5719-llvm-716b0730c1a287e19c474243e2ae57ecdd136be2.zip
[C++11] Add 'override' keywords to tablegen code.
llvm-svn: 202937
Diffstat (limited to 'llvm/utils/TableGen/CodeGenSchedule.cpp')
-rw-r--r--llvm/utils/TableGen/CodeGenSchedule.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/utils/TableGen/CodeGenSchedule.cpp b/llvm/utils/TableGen/CodeGenSchedule.cpp
index 39af61f7564..c84fe6d82d7 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/CodeGenSchedule.cpp
@@ -39,8 +39,8 @@ static void dumpIdxVec(const SmallVectorImpl<unsigned> &V) {
namespace {
// (instrs a, b, ...) Evaluate and union all arguments. Identical to AddOp.
struct InstrsOp : public SetTheory::Operator {
- virtual void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
+ void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
+ ArrayRef<SMLoc> Loc) override {
ST.evaluate(Expr->arg_begin(), Expr->arg_end(), Elts, Loc);
}
};
@@ -58,7 +58,7 @@ struct InstRegexOp : public SetTheory::Operator {
InstRegexOp(const CodeGenTarget &t): Target(t) {}
void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
- ArrayRef<SMLoc> Loc) {
+ ArrayRef<SMLoc> Loc) override {
SmallVector<Regex*, 4> RegexList;
for (DagInit::const_arg_iterator
AI = Expr->arg_begin(), AE = Expr->arg_end(); AI != AE; ++AI) {
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