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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-06-18 16:49:33 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-06-18 16:49:33 +0000 |
| commit | b9f91667e1ca22e27ac7eb0274ea1e77f967284c (patch) | |
| tree | ccaa70dded07f23028aa6655e750cbc8df9333c4 /llvm/utils/TableGen/CodeGenDAGPatterns.cpp | |
| parent | 6cf1b791dd425152f1062cca190a3523ef3280ae (diff) | |
| download | bcm5719-llvm-b9f91667e1ca22e27ac7eb0274ea1e77f967284c.tar.gz bcm5719-llvm-b9f91667e1ca22e27ac7eb0274ea1e77f967284c.zip | |
Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86
does for {flags}. If we create virtual registers of the CCR class, RegAllocFast
may try to spill them, and we can't do that.
llvm-svn: 106289
Diffstat (limited to 'llvm/utils/TableGen/CodeGenDAGPatterns.cpp')
0 files changed, 0 insertions, 0 deletions
