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| author | Craig Topper <craig.topper@intel.com> | 2018-06-22 21:57:24 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-06-22 21:57:24 +0000 |
| commit | 1d707539e4de3205e393509da6bb9e52bba3fb79 (patch) | |
| tree | 3a1ae9195e21d18568cbedaa33d5ba20da645dd9 /llvm/tools/llvm-size/llvm-size.cpp | |
| parent | ec7d7f312e5cfd963e5796d1401843bab8df83ef (diff) | |
| download | bcm5719-llvm-1d707539e4de3205e393509da6bb9e52bba3fb79.tar.gz bcm5719-llvm-1d707539e4de3205e393509da6bb9e52bba3fb79.zip | |
[X86][AsmParser] In Intel syntax make sure we support ESP/RSP being the second register in memory expressions like [EAX+ESP].
By default, the second register gets assigned to the index register slot. But ESP can't be an index register so we need to swap it with the other register.
There's still a slight bug that we allow [EAX+ESP*1]. The existence of the multiply even though its with 1 should force ESP to the index register and trigger an error, but it doesn't currently.
llvm-svn: 335394
Diffstat (limited to 'llvm/tools/llvm-size/llvm-size.cpp')
0 files changed, 0 insertions, 0 deletions
