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authorCraig Topper <craig.topper@intel.com>2018-04-24 04:28:02 +0000
committerCraig Topper <craig.topper@intel.com>2018-04-24 04:28:02 +0000
commit19b85103a3266bebbd762244d6c00afdcaaaec09 (patch)
tree581755990f6f9d7a34e4489d8d7500cc8f7d33bd /llvm/tools/llvm-objcopy/llvm-objcopy.cpp
parentce281a41b5244fae305a2fe202c75e6809b13d67 (diff)
downloadbcm5719-llvm-19b85103a3266bebbd762244d6c00afdcaaaec09.tar.gz
bcm5719-llvm-19b85103a3266bebbd762244d6c00afdcaaaec09.zip
[X86] Add a BSWAP16 instruction using the 32-bit encoding plus a 0x66 prefix.
This encoding is recognized by the CPU, but the behavior is undefined. This makes the disassembler handle it correctly so we don't print bswapl with a 16-bit register. llvm-svn: 330682
Diffstat (limited to 'llvm/tools/llvm-objcopy/llvm-objcopy.cpp')
0 files changed, 0 insertions, 0 deletions
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