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| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-03-21 18:11:05 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-03-21 18:11:05 +0000 |
| commit | 12ef5260ea2fada35c830266e926441c671cf5a5 (patch) | |
| tree | 31bbebb837ec96827d4be3898cfaa302a56bb9cc /llvm/tools/llvm-mca/Dispatch.h | |
| parent | 949437e8829d93e5110ab1c68fbe7359d3a5f34c (diff) | |
| download | bcm5719-llvm-12ef5260ea2fada35c830266e926441c671cf5a5.tar.gz bcm5719-llvm-12ef5260ea2fada35c830266e926441c671cf5a5.zip | |
[llvm-mca] Move the logic that computes the register file usage to the BackendStatistics view.
With this patch, the "instruction dispatched" event now provides information
related to the number of microarchitectural registers used in each register
file. Similarly, the "instruction retired" event is now able to tell how may
registers are freed in each register file.
Currently, the BackendStatistics view is the only consumer of register
usage/pressure information. BackendStatistics uses that info to print out a few
general statistics (i.e. max number of mappings used; total mapping created).
Before this patch, the BackendStatistics was forced to query the Backend to
obtain the register pressure information.
This helps removes that dependency. Now views are completely independent from
the Backend. As a consequence, it should be easier to address PR36663 and
further modularize the pipeline.
Added a couple of test cases in the BtVer2 specific directory.
llvm-svn: 328129
Diffstat (limited to 'llvm/tools/llvm-mca/Dispatch.h')
| -rw-r--r-- | llvm/tools/llvm-mca/Dispatch.h | 38 |
1 files changed, 11 insertions, 27 deletions
diff --git a/llvm/tools/llvm-mca/Dispatch.h b/llvm/tools/llvm-mca/Dispatch.h index ceb36138114..c1093fa73ba 100644 --- a/llvm/tools/llvm-mca/Dispatch.h +++ b/llvm/tools/llvm-mca/Dispatch.h @@ -43,14 +43,9 @@ class RegisterFile { const unsigned TotalMappings; // Number of mappings that are currently in use. unsigned NumUsedMappings; - // Maximum number of register mappings used. - unsigned MaxUsedMappings; - // Total number of mappings allocated during the entire execution. - unsigned TotalMappingsCreated; RegisterMappingTracker(unsigned NumMappings) - : TotalMappings(NumMappings), NumUsedMappings(0), MaxUsedMappings(0), - TotalMappingsCreated(0) {} + : TotalMappings(NumMappings), NumUsedMappings(0) {} }; // This is where information related to the various register files is kept. @@ -105,11 +100,13 @@ class RegisterFile { // Allocates a new register mapping in every register file specified by the // register file mask. This method is called from addRegisterMapping. - void createNewMappings(unsigned RegisterFileMask); + void createNewMappings(unsigned RegisterFileMask, + llvm::MutableArrayRef<unsigned> UsedPhysRegs); // Removes a previously allocated mapping from each register file in the // RegisterFileMask set. This method is called from invalidateRegisterMapping. - void removeMappings(unsigned RegisterFileMask); + void removeMappings(unsigned RegisterFileMask, + llvm::MutableArrayRef<unsigned> FreedPhysRegs); public: RegisterFile(const llvm::MCRegisterInfo &mri, unsigned TempRegs = 0) @@ -121,12 +118,14 @@ public: // Creates a new register mapping for RegID. // This reserves a microarchitectural register in every register file that // contains RegID. - void addRegisterMapping(WriteState &WS); + void addRegisterMapping(WriteState &WS, + llvm::MutableArrayRef<unsigned> UsedPhysRegs); // Invalidates register mappings associated to the input WriteState object. // This releases previously allocated mappings for the physical register // associated to the WriteState. - void invalidateRegisterMapping(const WriteState &WS); + void invalidateRegisterMapping(const WriteState &WS, + llvm::MutableArrayRef<unsigned> FreedPhysRegs); // Checks if there are enough microarchitectural registers in the register // files. Returns a "response mask" where each bit is the response from a @@ -138,16 +137,7 @@ public: void collectWrites(llvm::SmallVectorImpl<WriteState *> &Writes, unsigned RegID) const; void updateOnRead(ReadState &RS, unsigned RegID); - unsigned getMaxUsedRegisterMappings(unsigned RegisterFileIndex) const { - assert(RegisterFileIndex < getNumRegisterFiles() && - "Invalid register file index!"); - return RegisterFiles[RegisterFileIndex].MaxUsedMappings; - } - unsigned getTotalRegisterMappingsCreated(unsigned RegisterFileIndex) const { - assert(RegisterFileIndex < getNumRegisterFiles() && - "Invalid register file index!"); - return RegisterFiles[RegisterFileIndex].TotalMappingsCreated; - } + unsigned getNumRegisterFiles() const { return RegisterFiles.size(); } #ifndef NDEBUG @@ -260,7 +250,7 @@ class DispatchUnit { bool checkScheduler(unsigned Index, const InstrDesc &Desc); void updateRAWDependencies(ReadState &RS, const llvm::MCSubtargetInfo &STI); - void notifyInstructionDispatched(unsigned IID); + void notifyInstructionDispatched(unsigned IID, llvm::ArrayRef<unsigned> UsedPhysRegs); public: DispatchUnit(Backend *B, const llvm::MCRegisterInfo &MRI, @@ -296,12 +286,6 @@ public: unsigned RegID) const { return RAT->collectWrites(Vec, RegID); } - unsigned getMaxUsedRegisterMappings(unsigned RegFileIndex = 0) const { - return RAT->getMaxUsedRegisterMappings(RegFileIndex); - } - unsigned getTotalRegisterMappingsCreated(unsigned RegFileIndex = 0) const { - return RAT->getTotalRegisterMappingsCreated(RegFileIndex); - } void cycleEvent(unsigned Cycle) { RCU->cycleEvent(); |

