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| author | Ted Woodward <ted.woodward@codeaurora.org> | 2015-05-11 21:12:33 +0000 |
|---|---|---|
| committer | Ted Woodward <ted.woodward@codeaurora.org> | 2015-05-11 21:12:33 +0000 |
| commit | e76e7e9369ca1b8309d15e26b31a2bf24b311ed7 (patch) | |
| tree | 120d6affb5b7f5e56816122427bede3c1a61607c /llvm/tools/llvm-as/llvm-as.cpp | |
| parent | 5b202966f5e7dec49055fffd4b6eea005530b0bc (diff) | |
| download | bcm5719-llvm-e76e7e9369ca1b8309d15e26b31a2bf24b311ed7.tar.gz bcm5719-llvm-e76e7e9369ca1b8309d15e26b31a2bf24b311ed7.zip | |
Add Hexagon packet support to ThreadPlanStepRange
Summary:
Hexagon is a VLIW processor. It can execute multiple instructions at once, called a packet. Breakpoints need to be alone in a packet. This patch will make sure that temporary breakpoints used for stepping are set at the start of a packet, which will put the breakpoint in a packet by itself.
Patch by Deepak Panickal of CodePlay and Ted Woodward of Qualcomm.
Reviewers: deepak2427, clayborg
Reviewed By: clayborg
Subscribers: lldb-commits
Differential Revision: http://reviews.llvm.org/D9437
llvm-svn: 237047
Diffstat (limited to 'llvm/tools/llvm-as/llvm-as.cpp')
0 files changed, 0 insertions, 0 deletions
