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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-04-29 21:16:52 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-04-29 21:16:52 +0000 |
| commit | dc4ebad6d462bdc622a912386464fdec0acd7d4f (patch) | |
| tree | 2df69572d638cc2c3d1f0726cc80c26e679a7840 /llvm/test | |
| parent | cd62bf58219d78e9557a20eddb886c7cc582feb7 (diff) | |
| download | bcm5719-llvm-dc4ebad6d462bdc622a912386464fdec0acd7d4f.tar.gz bcm5719-llvm-dc4ebad6d462bdc622a912386464fdec0acd7d4f.zip | |
AMDGPU: Add kernarg.segment.ptr intrinsic
llvm-svn: 268105
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll new file mode 100644 index 00000000000..eaffe8c4699 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll @@ -0,0 +1,21 @@ +; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=HSA -check-prefix=ALL %s +; RUN: llc -mtriple=amdgcn-mesa-mesa3d -verify-machineinstrs < %s | FileCheck -check-prefix=MESA -check-prefix=ALL %s + +; ALL-LABEL: {{^}}test: +; HSA: enable_sgpr_kernarg_segment_ptr = 1 +; HSA: s_load_dword s{{[0-9]+}}, s[4:5], 0xa + +; MESA: s_load_dword s{{[0-9]+}}, s[0:1], 0xa +define void @test(i32 addrspace(1)* %out) #1 { + %kernarg.segment.ptr = call noalias i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr() + %header.ptr = bitcast i8 addrspace(2)* %kernarg.segment.ptr to i32 addrspace(2)* + %gep = getelementptr i32, i32 addrspace(2)* %header.ptr, i64 10 + %value = load i32, i32 addrspace(2)* %gep + store i32 %value, i32 addrspace(1)* %out + ret void +} + +declare i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr() #0 + +attributes #0 = { nounwind readnone } +attributes #1 = { nounwind } |
