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authorEhsan Amiri <amehsan@ca.ibm.com>2016-11-23 16:32:05 +0000
committerEhsan Amiri <amehsan@ca.ibm.com>2016-11-23 16:32:05 +0000
commit5ea1054dabb414e2e8cb89c90698300dae0bf7c4 (patch)
tree1e1b63a0a8c5da44af7dc3127f43900007fa5adb /llvm/test
parent01bcfc1414e980a177cd2f692f316a16a3667963 (diff)
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[PPC] support for arithmetic builtins in the FE
This adds various overloads of the following builtins to altivec.h: vec_neg vec_nabs vec_adde vec_addec vec_sube vec_subec vec_subc Note that for vec_sub builtins on 32 bit integers, the semantics is similar to what ISA describes for instructions like vsubecuq that work on quadwords: the first operand is added to the one's complement of the second operand. (As opposed to two's complement which I expected). llvm-svn: 287772
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