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| author | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-04-30 11:28:42 +0000 |
|---|---|---|
| committer | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-04-30 11:28:42 +0000 |
| commit | 525bc4f708c99546bb634e285c706cc3cd61d659 (patch) | |
| tree | a37ad54f92a05206deea285688eebbfdb56a5552 /llvm/test | |
| parent | c0284d118f730e343d75762118385593e5aa6ce4 (diff) | |
| download | bcm5719-llvm-525bc4f708c99546bb634e285c706cc3cd61d659.tar.gz bcm5719-llvm-525bc4f708c99546bb634e285c706cc3cd61d659.zip | |
[mips] Add support for .cpload.
Summary:
This directive is used for setting up $gp in the beginning of a function.
It expands to three instructions if PIC is enabled:
lui $gp, %hi(_gp_disp)
addui $gp, $gp, %lo(_gp_disp)
addu $gp, $gp, $reg
_gp_disp is a special symbol that the linker sets to the distance between
the lui instruction and the context pointer (_gp).
Reviewers: dsanders
Reviewed By: dsanders
Differential Revision: http://reviews.llvm.org/D3480
llvm-svn: 207637
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Mips/cpload-bad.s | 15 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/cpload.s | 33 |
2 files changed, 48 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/cpload-bad.s b/llvm/test/MC/Mips/cpload-bad.s new file mode 100644 index 00000000000..7d186f66f72 --- /dev/null +++ b/llvm/test/MC/Mips/cpload-bad.s @@ -0,0 +1,15 @@ +# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1 +# RUN: FileCheck %s < %t1 -check-prefix=ASM + + .text + .option pic2 + .set reorder + .cpload $25 +# ASM: :[[@LINE-1]]:9: warning: .cpload in reorder section + .set noreorder + .cpload $32 +# ASM: :[[@LINE-1]]:17: error: invalid register + .cpload $foo +# ASM: :[[@LINE-1]]:17: error: expected register containing function address + .cpload bar +# ASM: :[[@LINE-1]]:17: error: expected register containing function address diff --git a/llvm/test/MC/Mips/cpload.s b/llvm/test/MC/Mips/cpload.s new file mode 100644 index 00000000000..bc5e79787ba --- /dev/null +++ b/llvm/test/MC/Mips/cpload.s @@ -0,0 +1,33 @@ +# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=ASM +# +# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o -| \ +# RUN: llvm-objdump -d -r -arch=mips - | \ +# RUN: FileCheck %s -check-prefix=OBJ + +# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -filetype=obj -o -| \ +# RUN: llvm-objdump -d -r -arch=mips - | \ +# RUN: FileCheck %s -check-prefix=OBJ64 + +# ASM: .text +# ASM: .option pic2 +# ASM: .set noreorder +# ASM: .cpload $25 +# ASM: .set reorder + +# OBJ: .text +# OBJ: lui $gp, 0 +# OBJ: R_MIPS_HI16 _gp_disp +# OBJ: addiu $gp, $gp, 0 +# OBJ: R_MIPS_LO16 _gp_disp +# OBJ: addu $gp, $gp, $25 + +# OBJ64: .text +# OBJ64-NOT: lui $gp, 0 +# OBJ64-NOT: addiu $gp, $gp, 0 +# OBJ64-NOT: addu $gp, $gp, $25 + + .text + .option pic2 + .set noreorder + .cpload $25 + .set reorder |
