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authorSanjay Patel <spatel@rotateright.com>2018-10-23 13:39:40 +0000
committerSanjay Patel <spatel@rotateright.com>2018-10-23 13:39:40 +0000
commitd3d2a0b591e30283f85d32795fe92eaa96377292 (patch)
tree42829f8a5903d9274276acd80a783921fc958fe9 /llvm/test/Transforms/StraightLineStrengthReduce
parent06e4db07af09995488c3e3bb1217554ce383c171 (diff)
downloadbcm5719-llvm-d3d2a0b591e30283f85d32795fe92eaa96377292.tar.gz
bcm5719-llvm-d3d2a0b591e30283f85d32795fe92eaa96377292.zip
[SLSR] auto-generate full test assertions; NFC
llvm-svn: 345028
Diffstat (limited to 'llvm/test/Transforms/StraightLineStrengthReduce')
-rw-r--r--llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll131
1 files changed, 79 insertions, 52 deletions
diff --git a/llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll b/llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll
index b4f448ace2a..c3bffb270af 100644
--- a/llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll
+++ b/llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll
@@ -1,51 +1,66 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -slsr -gvn -S | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
define void @shl(i32 %b, i32 %s) {
; CHECK-LABEL: @shl(
- %1 = add i32 %b, %s
-; [[BASIS:%[a-zA-Z0-9]+]] = add i32 %b, %s
- call void @foo(i32 %1)
+; CHECK-NEXT: [[T1:%.*]] = add i32 [[B:%.*]], [[S:%.*]]
+; CHECK-NEXT: call void @foo(i32 [[T1]])
+; CHECK-NEXT: [[T2:%.*]] = add i32 [[T1]], [[S]]
+; CHECK-NEXT: call void @foo(i32 [[T2]])
+; CHECK-NEXT: ret void
+;
+ %t1 = add i32 %b, %s
+ call void @foo(i32 %t1)
%s2 = shl i32 %s, 1
- %2 = add i32 %b, %s2
-; add i32 [[BASIS]], %s
- call void @foo(i32 %2)
+ %t2 = add i32 %b, %s2
+ call void @foo(i32 %t2)
ret void
}
define void @stride_is_2s(i32 %b, i32 %s) {
; CHECK-LABEL: @stride_is_2s(
+; CHECK-NEXT: [[S2:%.*]] = shl i32 [[S:%.*]], 1
+; CHECK-NEXT: [[T1:%.*]] = add i32 [[B:%.*]], [[S2]]
+; CHECK-NEXT: call void @foo(i32 [[T1]])
+; CHECK-NEXT: [[T2:%.*]] = add i32 [[T1]], [[S2]]
+; CHECK-NEXT: call void @foo(i32 [[T2]])
+; CHECK-NEXT: [[T3:%.*]] = add i32 [[T2]], [[S2]]
+; CHECK-NEXT: call void @foo(i32 [[T3]])
+; CHECK-NEXT: ret void
+;
%s2 = shl i32 %s, 1
-; CHECK: %s2 = shl i32 %s, 1
- %1 = add i32 %b, %s2
-; CHECK: [[t1:%[a-zA-Z0-9]+]] = add i32 %b, %s2
- call void @foo(i32 %1)
+ %t1 = add i32 %b, %s2
+ call void @foo(i32 %t1)
%s4 = shl i32 %s, 2
- %2 = add i32 %b, %s4
-; CHECK: [[t2:%[a-zA-Z0-9]+]] = add i32 [[t1]], %s2
- call void @foo(i32 %2)
+ %t2 = add i32 %b, %s4
+ call void @foo(i32 %t2)
%s6 = mul i32 %s, 6
- %3 = add i32 %b, %s6
-; CHECK: add i32 [[t2]], %s2
- call void @foo(i32 %3)
+ %t3 = add i32 %b, %s6
+ call void @foo(i32 %t3)
ret void
}
define void @stride_is_3s(i32 %b, i32 %s) {
; CHECK-LABEL: @stride_is_3s(
- %1 = add i32 %s, %b
-; CHECK: [[t1:%[a-zA-Z0-9]+]] = add i32 %s, %b
- call void @foo(i32 %1)
+; CHECK-NEXT: [[T1:%.*]] = add i32 [[S:%.*]], [[B:%.*]]
+; CHECK-NEXT: call void @foo(i32 [[T1]])
+; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[S]], 3
+; CHECK-NEXT: [[T2:%.*]] = add i32 [[T1]], [[TMP1]]
+; CHECK-NEXT: call void @foo(i32 [[T2]])
+; CHECK-NEXT: [[T3:%.*]] = add i32 [[T2]], [[TMP1]]
+; CHECK-NEXT: call void @foo(i32 [[T3]])
+; CHECK-NEXT: ret void
+;
+ %t1 = add i32 %s, %b
+ call void @foo(i32 %t1)
%s4 = shl i32 %s, 2
- %2 = add i32 %s4, %b
-; CHECK: [[bump:%[a-zA-Z0-9]+]] = mul i32 %s, 3
-; CHECK: [[t2:%[a-zA-Z0-9]+]] = add i32 [[t1]], [[bump]]
- call void @foo(i32 %2)
+ %t2 = add i32 %s4, %b
+ call void @foo(i32 %t2)
%s7 = mul i32 %s, 7
- %3 = add i32 %s7, %b
-; CHECK: add i32 [[t2]], [[bump]]
- call void @foo(i32 %3)
+ %t3 = add i32 %s7, %b
+ call void @foo(i32 %t3)
ret void
}
@@ -62,22 +77,25 @@ define void @stride_is_3s(i32 %b, i32 %s) {
; foo(t3);
define void @stride_is_minus_2s(i32 %b, i32 %s) {
; CHECK-LABEL: @stride_is_minus_2s(
+; CHECK-NEXT: [[S6:%.*]] = mul i32 [[S:%.*]], 6
+; CHECK-NEXT: [[T1:%.*]] = add i32 [[B:%.*]], [[S6]]
+; CHECK-NEXT: call void @foo(i32 [[T1]])
+; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[S]], 1
+; CHECK-NEXT: [[T2:%.*]] = sub i32 [[T1]], [[TMP1]]
+; CHECK-NEXT: call void @foo(i32 [[T2]])
+; CHECK-NEXT: [[T3:%.*]] = sub i32 [[T2]], [[TMP1]]
+; CHECK-NEXT: call void @foo(i32 [[T3]])
+; CHECK-NEXT: ret void
+;
%s6 = mul i32 %s, 6
- %1 = add i32 %b, %s6
-; CHECK: [[t1:%[a-zA-Z0-9]+]] = add i32 %b, %s6
-; CHECK: call void @foo(i32 [[t1]])
- call void @foo(i32 %1)
+ %t1 = add i32 %b, %s6
+ call void @foo(i32 %t1)
%s4 = shl i32 %s, 2
- %2 = add i32 %b, %s4
-; CHECK: [[bump:%[a-zA-Z0-9]+]] = shl i32 %s, 1
-; CHECK: [[t2:%[a-zA-Z0-9]+]] = sub i32 [[t1]], [[bump]]
- call void @foo(i32 %2)
-; CHECK: call void @foo(i32 [[t2]])
+ %t2 = add i32 %b, %s4
+ call void @foo(i32 %t2)
%s2 = shl i32 %s, 1
- %3 = add i32 %b, %s2
-; CHECK: [[t3:%[a-zA-Z0-9]+]] = sub i32 [[t2]], [[bump]]
- call void @foo(i32 %3)
-; CHECK: call void @foo(i32 [[t3]])
+ %t3 = add i32 %b, %s2
+ call void @foo(i32 %t3)
ret void
}
@@ -88,27 +106,36 @@ define void @stride_is_minus_2s(i32 %b, i32 %s) {
; do not rewrite b + s to t - 7 * s because the latter is more complicated.
define void @simple_enough(i32 %b, i32 %s) {
; CHECK-LABEL: @simple_enough(
+; CHECK-NEXT: [[S8:%.*]] = shl i32 [[S:%.*]], 3
+; CHECK-NEXT: [[T1:%.*]] = add i32 [[B:%.*]], [[S8]]
+; CHECK-NEXT: call void @foo(i32 [[T1]])
+; CHECK-NEXT: [[T2:%.*]] = add i32 [[B]], [[S]]
+; CHECK-NEXT: call void @foo(i32 [[T2]])
+; CHECK-NEXT: ret void
+;
%s8 = shl i32 %s, 3
- %1 = add i32 %b, %s8
- call void @foo(i32 %1)
- %2 = add i32 %b, %s
-; CHECK: [[t:%[a-zA-Z0-9]+]] = add i32 %b, %s{{$}}
- call void @foo(i32 %2)
-; CHECK: call void @foo(i32 [[t]])
+ %t1 = add i32 %b, %s8
+ call void @foo(i32 %t1)
+ %t2 = add i32 %b, %s
+ call void @foo(i32 %t2)
ret void
}
define void @slsr_strided_add_128bit(i128 %b, i128 %s) {
; CHECK-LABEL: @slsr_strided_add_128bit(
+; CHECK-NEXT: [[S125:%.*]] = shl i128 [[S:%.*]], 125
+; CHECK-NEXT: [[T1:%.*]] = add i128 [[B:%.*]], [[S125]]
+; CHECK-NEXT: call void @bar(i128 [[T1]])
+; CHECK-NEXT: [[T2:%.*]] = add i128 [[T1]], [[S125]]
+; CHECK-NEXT: call void @bar(i128 [[T2]])
+; CHECK-NEXT: ret void
+;
%s125 = shl i128 %s, 125
%s126 = shl i128 %s, 126
- %1 = add i128 %b, %s125
-; CHECK: [[t1:%[a-zA-Z0-9]+]] = add i128 %b, %s125
- call void @bar(i128 %1)
- %2 = add i128 %b, %s126
-; CHECK: [[t2:%[a-zA-Z0-9]+]] = add i128 [[t1]], %s125
- call void @bar(i128 %2)
-; CHECK: call void @bar(i128 [[t2]])
+ %t1 = add i128 %b, %s125
+ call void @bar(i128 %t1)
+ %t2 = add i128 %b, %s126
+ call void @bar(i128 %t2)
ret void
}
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