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| author | Alexey Bataev <a.bataev@hotmail.com> | 2019-01-11 20:21:14 +0000 |
|---|---|---|
| committer | Alexey Bataev <a.bataev@hotmail.com> | 2019-01-11 20:21:14 +0000 |
| commit | ce2c8b3360c2270fb95a2a98bef2bedeef476415 (patch) | |
| tree | 2c19359ac4ce3ce868395b08b1666399c946bc4a /llvm/test/Transforms/SLPVectorizer/X86/cycle_dup.ll | |
| parent | 6b7f5aac7270472115ad98b56919f8dcbc48a419 (diff) | |
| download | bcm5719-llvm-ce2c8b3360c2270fb95a2a98bef2bedeef476415.tar.gz bcm5719-llvm-ce2c8b3360c2270fb95a2a98bef2bedeef476415.zip | |
[SLP]Update test checks for the SPL vectorizer, NFC.
llvm-svn: 350967
Diffstat (limited to 'llvm/test/Transforms/SLPVectorizer/X86/cycle_dup.ll')
| -rw-r--r-- | llvm/test/Transforms/SLPVectorizer/X86/cycle_dup.ll | 32 |
1 files changed, 22 insertions, 10 deletions
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/cycle_dup.ll b/llvm/test/Transforms/SLPVectorizer/X86/cycle_dup.ll index 0a4e961c2e8..ac693330478 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/cycle_dup.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/cycle_dup.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" @@ -11,17 +12,28 @@ target triple = "x86_64-apple-macosx10.9.0" ; A[0] = r; A[1] = g; A[2] = b; A[3] = a; ; } -;CHECK-LABEL: @foo -;CHECK: bitcast i32* %A to <4 x i32>* -;CHECK-NEXT: load <4 x i32> -;CHECK: phi <4 x i32> -;CHECK-NEXT: mul nsw <4 x i32> -;CHECK-NOT: mul -;CHECK: phi <4 x i32> -;CHECK: bitcast i32* %A to <4 x i32>* -;CHECK-NEXT: store <4 x i32> -;CHECK-NEXT:ret i32 undef define i32 @foo(i32* nocapture %A) #0 { +; CHECK-LABEL: @foo( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[A:%.*]] to <4 x i32>* +; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4 +; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 13 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 +; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[TMP2]], 0 +; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] +; CHECK: for.body: +; CHECK-NEXT: [[I_029:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ] +; CHECK-NEXT: [[TMP3:%.*]] = phi <4 x i32> [ [[TMP4:%.*]], [[FOR_BODY]] ], [ [[TMP1]], [[ENTRY]] ] +; CHECK-NEXT: [[TMP4]] = mul nsw <4 x i32> <i32 18, i32 19, i32 12, i32 9>, [[TMP3]] +; CHECK-NEXT: [[INC]] = add nsw i32 [[I_029]], 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[TMP2]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]] +; CHECK: for.end: +; CHECK-NEXT: [[TMP5:%.*]] = phi <4 x i32> [ [[TMP1]], [[ENTRY]] ], [ [[TMP4]], [[FOR_BODY]] ] +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[A]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP6]], align 4 +; CHECK-NEXT: ret i32 undef +; entry: %0 = load i32, i32* %A, align 4 %arrayidx1 = getelementptr inbounds i32, i32* %A, i64 1 |
