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| author | Sanjay Patel <spatel@rotateright.com> | 2016-07-21 00:24:18 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-07-21 00:24:18 +0000 |
| commit | 0753c06d9cfd7cbb6af1ed13af073cc274522862 (patch) | |
| tree | d1979e133c60dda0c86264b1643e6625952f00b8 /llvm/test/Transforms/InstCombine/zext.ll | |
| parent | 99bd2de6194551d429751afc77030fdaed4e4dae (diff) | |
| download | bcm5719-llvm-0753c06d9cfd7cbb6af1ed13af073cc274522862.tar.gz bcm5719-llvm-0753c06d9cfd7cbb6af1ed13af073cc274522862.zip | |
[InstCombine] LogicOpc (zext X), C --> zext (LogicOpc X, C) (PR28476)
The benefits of this change include:
1. Remove DeMorgan-matching code that was added specifically to work-around
the missing transform in http://reviews.llvm.org/rL248634.
2. Makes the DeMorgan transform work for vectors too.
3. Fix PR28476: https://llvm.org/bugs/show_bug.cgi?id=28476
Extending this transform to other casts and other associative operators may
be useful too. See https://reviews.llvm.org/D22421 for a prerequisite for
doing that though.
Differential Revision: https://reviews.llvm.org/D22271
llvm-svn: 276221
Diffstat (limited to 'llvm/test/Transforms/InstCombine/zext.ll')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/zext.ll | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/llvm/test/Transforms/InstCombine/zext.ll b/llvm/test/Transforms/InstCombine/zext.ll index 2420393bfb1..1fb15a538c9 100644 --- a/llvm/test/Transforms/InstCombine/zext.ll +++ b/llvm/test/Transforms/InstCombine/zext.ll @@ -13,8 +13,8 @@ define i64 @test_sext_zext(i16 %A) { define <2 x i64> @test2(<2 x i1> %A) { ; CHECK-LABEL: @test2( -; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i1> %A to <2 x i64> -; CHECK-NEXT: [[ZEXT:%.*]] = xor <2 x i64> [[TMP1]], <i64 1, i64 1> +; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i1> %A, <i1 true, i1 true> +; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i1> [[XOR]] to <2 x i64> ; CHECK-NEXT: ret <2 x i64> [[ZEXT]] ; %xor = xor <2 x i1> %A, <i1 true, i1 true> @@ -46,13 +46,10 @@ define <2 x i64> @test4(<2 x i64> %A) { ret <2 x i64> %zext } -; FIXME: If the xor was done in the smaller type, the back-to-back zexts would get combined. - define i64 @fold_xor_zext_sandwich(i1 %a) { ; CHECK-LABEL: @fold_xor_zext_sandwich( -; CHECK-NEXT: [[ZEXT1:%.*]] = zext i1 %a to i32 -; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[ZEXT1]], 1 -; CHECK-NEXT: [[ZEXT2:%.*]] = zext i32 [[XOR]] to i64 +; CHECK-NEXT: [[TMP1:%.*]] = xor i1 %a, true +; CHECK-NEXT: [[ZEXT2:%.*]] = zext i1 [[TMP1]] to i64 ; CHECK-NEXT: ret i64 [[ZEXT2]] ; %zext1 = zext i1 %a to i32 @@ -63,9 +60,9 @@ define i64 @fold_xor_zext_sandwich(i1 %a) { define <2 x i64> @fold_xor_zext_sandwich_vec(<2 x i1> %a) { ; CHECK-LABEL: @fold_xor_zext_sandwich_vec( -; CHECK-NEXT: [[ZEXT1:%.*]] = zext <2 x i1> %a to <2 x i64> -; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i64> [[ZEXT1]], <i64 1, i64 1> -; CHECK-NEXT: ret <2 x i64> [[XOR]] +; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i1> %a, <i1 true, i1 true> +; CHECK-NEXT: [[ZEXT2:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[ZEXT2]] ; %zext1 = zext <2 x i1> %a to <2 x i32> %xor = xor <2 x i32> %zext1, <i32 1, i32 1> |
