[InstCombine] transform bitcasted bitwise logic ops with constants (PR26702)

Given that we're not actually reducing the instruction count in the included
regression tests, I think we would call this a canonicalization step.

The motivation comes from the example in PR26702:
https://llvm.org/bugs/show_bug.cgi?id=26702

If we hoist the bitwise logic ahead of the bitcast, the previously unoptimizable
example of:

define <4 x i32> @is_negative(<4 x i32> %x) {
  %lobit = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
  %not = xor <4 x i32> %lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
  %bc = bitcast <4 x i32> %not to <2 x i64>
  %notnot = xor <2 x i64> %bc, <i64 -1, i64 -1>
  %bc2 = bitcast <2 x i64> %notnot to <4 x i32>
  ret <4 x i32> %bc2
}

Simplifies to the expected:

define <4 x i32> @is_negative(<4 x i32> %x) {
  %lobit = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
  ret <4 x i32> %lobit
}

Differential Revision: http://reviews.llvm.org/D17583

llvm-svn: 262645

1 files changed, 6 insertions, 8 deletions

diff --git a/llvm/test/Transforms/InstCombine/bitcast.ll b/llvm/test/Transforms/InstCombine/bitcast.ll
index 2215b675fc1..254b6116e4c 100644
--- a/llvm/test/Transforms/InstCombine/bitcast.ll
+++ b/llvm/test/Transforms/InstCombine/bitcast.ll
@@ -30,8 +30,6 @@ define <2 x i32> @xor_two_vector_bitcasts(<1 x i64> %a, <1 x i64> %b) {
 ; CHECK-NEXT:  ret <2 x i32> %t3
 }
 
-; FIXME: Do the logic in the original type for the following 3 tests.
-
 ; Verify that 'xor' of vector and constant is done as a vector bitwise op before the bitcast.
 
 define <2 x i32> @xor_bitcast_vec_to_vec(<1 x i64> %a) {
@@ -40,8 +38,8 @@ define <2 x i32> @xor_bitcast_vec_to_vec(<1 x i64> %a) {
   ret <2 x i32> %t2
 
 ; CHECK-LABEL: @xor_bitcast_vec_to_vec(
-; CHECK-NEXT:  %t1 = bitcast <1 x i64> %a to <2 x i32>
-; CHECK-NEXT:  %t2 = xor <2 x i32> %t1, <i32 1, i32 2>
+; CHECK-NEXT:  %t21 = xor <1 x i64> %a, <i64 8589934593> 
+; CHECK-NEXT:  %t2 = bitcast <1 x i64> %t21 to <2 x i32>
 ; CHECK-NEXT:  ret <2 x i32> %t2
 }
 
@@ -53,8 +51,8 @@ define i64 @and_bitcast_vec_to_int(<2 x i32> %a) {
   ret i64 %t2
 
 ; CHECK-LABEL: @and_bitcast_vec_to_int(
-; CHECK-NEXT:  %t1 = bitcast <2 x i32> %a to i64
-; CHECK-NEXT:  %t2 = and i64 %t1, 3
+; CHECK-NEXT:  %t21 = and <2 x i32> %a, <i32 3, i32 0>
+; CHECK-NEXT:  %t2 = bitcast <2 x i32> %t21 to i64
 ; CHECK-NEXT:  ret i64 %t2
 }
 
@@ -66,8 +64,8 @@ define <2 x i32> @or_bitcast_int_to_vec(i64 %a) {
   ret <2 x i32> %t2
 
 ; CHECK-LABEL: @or_bitcast_int_to_vec(
-; CHECK-NEXT:  %t1 = bitcast i64 %a to <2 x i32>
-; CHECK-NEXT:  %t2 = or <2 x i32> %t1, <i32 1, i32 2>
+; CHECK-NEXT:  %t21 = or i64 %a, 8589934593
+; CHECK-NEXT:  %t2 = bitcast i64 %t21 to <2 x i32>
 ; CHECK-NEXT:  ret <2 x i32> %t2
 }