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| author | Chuang-Yu Cheng <cycheng@multicorewareinc.com> | 2016-03-26 05:46:11 +0000 |
|---|---|---|
| committer | Chuang-Yu Cheng <cycheng@multicorewareinc.com> | 2016-03-26 05:46:11 +0000 |
| commit | 065969ec8e492eb8f9724492bda55d3ec9b7e68d (patch) | |
| tree | 0865e77923eacbad0f8633a5aaf8bd618ec13f9b /llvm/test/MC/Disassembler/PowerPC | |
| parent | 01e321306b9f505afa2c15428bfcb2143a70a95f (diff) | |
| download | bcm5719-llvm-065969ec8e492eb8f9724492bda55d3ec9b7e68d.tar.gz bcm5719-llvm-065969ec8e492eb8f9724492bda55d3ec9b7e68d.zip | |
[Power9] Implement new altivec instructions: permute, count zero, extend sign, negate, parity, shift/rotate, mul10
This change implements the following vector operations:
- vclzlsbb vctzlsbb vctzb vctzd vctzh vctzw
- vextsb2w vextsh2w vextsb2d vextsh2d vextsw2d
- vnegd vnegw
- vprtybd vprtybq vprtybw
- vbpermd vpermr
- vrlwnm vrlwmi vrldnm vrldmi vslv vsrv
- vmul10cuq vmul10uq vmul10ecuq vmul10euq
28 instructions
Thanks Nemanja, Kit for invaluable hints and discussion!
Reviewers: hal, nemanja, kbarton, tjablin, amehsan
Phabricator: http://reviews.llvm.org/D15887
llvm-svn: 264504
Diffstat (limited to 'llvm/test/MC/Disassembler/PowerPC')
| -rw-r--r-- | llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt index f6011d2565f..7fb37d65d9f 100644 --- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt +++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt @@ -752,3 +752,88 @@ # CHECK: vinsertd 2, 3, 8 0x10 0x48 0x1b 0xcd +# Power9 instructions + +# CHECK: vclzlsbb 2, 3 +0x10 0x40 0x1e 0x02 + +# CHECK: vctzlsbb 2, 3 +0x10 0x41 0x1e 0x02 + +# CHECK: vctzb 2, 3 +0x10 0x5c 0x1e 0x02 + +# CHECK: vctzh 2, 3 +0x10 0x5d 0x1e 0x02 + +# CHECK: vctzw 2, 3 +0x10 0x5e 0x1e 0x02 + +# CHECK: vctzd 2, 3 +0x10 0x5f 0x1e 0x02 + +# CHECK: vextsb2w 2, 3 +0x10 0x50 0x1e 0x02 + +# CHECK: vextsh2w 2, 3 +0x10 0x51 0x1e 0x02 + +# CHECK: vextsb2d 2, 3 +0x10 0x58 0x1e 0x02 + +# CHECK: vextsh2d 2, 3 +0x10 0x59 0x1e 0x02 + +# CHECK: vextsw2d 2, 3 +0x10 0x5a 0x1e 0x02 + +# CHECK: vnegw 2, 3 +0x10 0x46 0x1e 0x02 + +# CHECK: vnegd 2, 3 +0x10 0x47 0x1e 0x02 + +# CHECK: vprtybw 2, 3 +0x10 0x48 0x1e 0x02 + +# CHECK: vprtybd 2, 3 +0x10 0x49 0x1e 0x02 + +# CHECK: vprtybq 2, 3 +0x10 0x4a 0x1e 0x02 + +# CHECK: vbpermd 2, 5, 17 +0x10 0x45 0x8d 0xcc + +# CHECK: vpermr 2, 3, 4, 5 +0x10 0x43 0x21 0x7b + +# CHECK: vrlwnm 2, 3, 4 +0x10 0x43 0x21 0x85 + +# CHECK: vrlwmi 2, 3, 4 +0x10 0x43 0x20 0x85 + +# CHECK: vrldnm 2, 3, 4 +0x10 0x43 0x21 0xc5 + +# CHECK: vrldmi 2, 3, 4 +0x10 0x43 0x20 0xc5 + +# CHECK: vslv 2, 3, 4 +0x10 0x43 0x27 0x44 + +# CHECK: vsrv 2, 3, 4 +0x10 0x43 0x27 0x04 + +# CHECK: vmul10uq 2, 3 +0x10 0x43 0x02 0x01 + +# CHECK: vmul10cuq 2, 3 +0x10 0x43 0x00 0x01 + +# CHECK: vmul10euq 2, 3, 4 +0x10 0x43 0x22 0x41 + +# CHECK: vmul10ecuq 2, 3, 4 +0x10 0x43 0x20 0x41 |
