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authorDaniel Sanders <daniel.sanders@imgtec.com>2016-02-01 15:13:31 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2016-02-01 15:13:31 +0000
commitf8bb23e50923e550de71af44ead47cf37b486deb (patch)
treee6f0e05af71e3a2ce6ebd0d524573b671884b62f /llvm/test/MC/Disassembler/Mips/mips32
parent7e7b7b2def1fa3efb55a7af294a92a4723263f77 (diff)
downloadbcm5719-llvm-f8bb23e50923e550de71af44ead47cf37b486deb.tar.gz
bcm5719-llvm-f8bb23e50923e550de71af44ead47cf37b486deb.zip
[mips] Range check uimm16 and fix several bugs this revealed.
Summary: The bugs were: * teq and similar take 4-bit unsigned immediates on microMIPS. * teqi and similar have side-effects like teq do. * shll_s.w and shra_r.w take 5-bit unsigned immediates. * The various DSP ext* instructions take a 5-bit immediate. * repl.qh takes an 8-bit unsigned immediate. * repl.ph takes a 10-bit unsigned immediate. * rddsp/wrdsp take a 10-bit unsigned immediate. * teqi and similar take signed 16-bit immediates (10-bit for microMIPS). * Out-of-range immediate macros for or/xor take a simm32/simm64 depending on architecture. I'll fix the simm64 case properly when I reach simm32. lui is a bit more lenient than GAS and accepts signed immediates in addition to unsigned. This is because MipsMCExpr can produce signed values when constant folding and it currently lacks a way of knowing it should fold to an unsigned value. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15446 llvm-svn: 259360
Diffstat (limited to 'llvm/test/MC/Disassembler/Mips/mips32')
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt10
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
index f71b2a16fcf..d86f9e518fa 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
@@ -105,14 +105,14 @@
0x04 0xd1 0x01 0x4c # CHECK: bgezal $6, 1332
0x04 0xd1 0x14 0x9b # CHECK: bgezal $6, 21104
0x04 0xd2 0x00 0x7a # CHECK: bltzall $6, 492
-0x05 0x8e 0x8c 0x31 # CHECK: tnei $12, 35889
+0x05 0x8e 0x8c 0x31 # CHECK: tnei $12, -29647
0x05 0x93 0x07 0x1f # CHECK: bgezall $12, 7296
-0x05 0xca 0xad 0xbd # CHECK: tlti $14, 44477
+0x05 0xca 0xad 0xbd # CHECK: tlti $14, -21059
0x06 0x22 0xf6 0x45 # CHECK: bltzl $17, -9960
0x06 0x28 0x13 0xa1 # CHECK: tgei $17, 5025
-0x06 0xac 0xbb 0xa0 # CHECK: teqi $21, 48032
-0x07 0xa9 0x90 0x33 # CHECK: tgeiu $sp, 36915
-0x07 0xeb 0xec 0x2c # CHECK: tltiu $ra, 60460
+0x06 0xac 0xbb 0xa0 # CHECK: teqi $21, -17504
+0x07 0xa9 0x90 0x33 # CHECK: tgeiu $sp, -28621
+0x07 0xeb 0xec 0x2c # CHECK: tltiu $ra, -5076
0x08 0x00 0x00 0x01 # CHECK: j 4
0x08 0x00 0x01 0x4c # CHECK: j 1328
0x09 0x33 0x00 0x2a # CHECK: j 80478376
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