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| author | Simon Dardis <simon.dardis@imgtec.com> | 2017-10-16 14:20:22 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2017-10-16 14:20:22 +0000 |
| commit | 0d378a9eed330cbf35fec1eb8f422f8312fc7c3a (patch) | |
| tree | d0b40e740ea3c13222010fdbf197923915ae91c0 /llvm/test/MC/Disassembler/Mips/micromips32r3/valid.txt | |
| parent | 7508fbd581fb0769ef7998dab5de42d7cf4373f0 (diff) | |
| download | bcm5719-llvm-0d378a9eed330cbf35fec1eb8f422f8312fc7c3a.tar.gz bcm5719-llvm-0d378a9eed330cbf35fec1eb8f422f8312fc7c3a.zip | |
[mips][micromips] Fix (dis)assembly of bc1(t|f)
Previously these instructions were marked codegen only and had
an under-specified instruction description that did not record the
fcc register.
Reviewers: atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D38847
llvm-svn: 315905
Diffstat (limited to 'llvm/test/MC/Disassembler/Mips/micromips32r3/valid.txt')
| -rw-r--r-- | llvm/test/MC/Disassembler/Mips/micromips32r3/valid.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/micromips32r3/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips32r3/valid.txt index 3be26bb5b66..675ef9e4e8b 100644 --- a/llvm/test/MC/Disassembler/Mips/micromips32r3/valid.txt +++ b/llvm/test/MC/Disassembler/Mips/micromips32r3/valid.txt @@ -55,6 +55,8 @@ 0x11 0x26 0x45 0x67 # CHECK: addi $9, $6, 17767 0x31 0x26 0xc5 0x67 # CHECK: addiu $9, $6, -15001 0x00 0xe6 0x49 0x50 # CHECK: addu $9, $6, $7 +0x43 0x80 0xff 0xe6 # CHECK: bc1f -48 +0x43 0xa0 0xff 0xe2 # CHECK: bc1t -56 0x00 0xe6 0x49 0x90 # CHECK: sub $9, $6, $7 0x00 0xa3 0x21 0xd0 # CHECK: subu $4, $3, $5 0x00 0xe0 0x31 0x90 # CHECK: sub $6, $zero, $7 |
