diff options
| author | Justin Holewinski <jholewinski@nvidia.com> | 2014-06-27 18:35:27 +0000 |
|---|---|---|
| committer | Justin Holewinski <jholewinski@nvidia.com> | 2014-06-27 18:35:27 +0000 |
| commit | ca7a4f136dec32878b60df2cdbda1d46feb2f0de (patch) | |
| tree | e4f0d076e47ed2500d5c47aca2e59dc497a3dd82 /llvm/test/CodeGen | |
| parent | 10c25968d8ac795a8a899972cd6e6dc48d3be510 (diff) | |
| download | bcm5719-llvm-ca7a4f136dec32878b60df2cdbda1d46feb2f0de.tar.gz bcm5719-llvm-ca7a4f136dec32878b60df2cdbda1d46feb2f0de.zip | |
[NVPTX] Add isel patterns for bit-field extract (bfe)
llvm-svn: 211932
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/NVPTX/bfe.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/NVPTX/bfe.ll b/llvm/test/CodeGen/NVPTX/bfe.ll new file mode 100644 index 00000000000..2e816fec2c5 --- /dev/null +++ b/llvm/test/CodeGen/NVPTX/bfe.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s + + +; CHECK: bfe0 +define i32 @bfe0(i32 %a) { +; CHECK: bfe.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, 4, 4 +; CHECK-NOT: shr +; CHECK-NOT: and + %val0 = ashr i32 %a, 4 + %val1 = and i32 %val0, 15 + ret i32 %val1 +} + +; CHECK: bfe1 +define i32 @bfe1(i32 %a) { +; CHECK: bfe.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, 3, 3 +; CHECK-NOT: shr +; CHECK-NOT: and + %val0 = ashr i32 %a, 3 + %val1 = and i32 %val0, 7 + ret i32 %val1 +} + +; CHECK: bfe2 +define i32 @bfe2(i32 %a) { +; CHECK: bfe.u32 %r{{[0-9]+}}, %r{{[0-9]+}}, 5, 3 +; CHECK-NOT: shr +; CHECK-NOT: and + %val0 = ashr i32 %a, 5 + %val1 = and i32 %val0, 7 + ret i32 %val1 +} |
