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| author | Craig Topper <craig.topper@intel.com> | 2018-01-24 17:58:57 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-24 17:58:57 +0000 |
| commit | 05af43fbad723fd5f518ed3b34595c371ac2834c (patch) | |
| tree | afe465295a52cad6161c04be794c4c4dabe136a8 /llvm/test/CodeGen | |
| parent | b85b484feed6eae184890dbd4f8c1986aaf62c17 (diff) | |
| download | bcm5719-llvm-05af43fbad723fd5f518ed3b34595c371ac2834c.tar.gz bcm5719-llvm-05af43fbad723fd5f518ed3b34595c371ac2834c.zip | |
[X86] Fix some inconsistencies in the itineraries and Sched for (V)PEXTRW/(V)PINSRW
The weirdest being that PEXTRWrr was tagged as a memory operation.
llvm-svn: 323353
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/X86/sse2-schedule.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/sse41-schedule.ll | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/sse2-schedule.ll b/llvm/test/CodeGen/X86/sse2-schedule.ll index 4fbce3bab23..c51d19a7c28 100644 --- a/llvm/test/CodeGen/X86/sse2-schedule.ll +++ b/llvm/test/CodeGen/X86/sse2-schedule.ll @@ -5496,7 +5496,7 @@ define i16 @test_pextrw(<8 x i16> %a0) { ; ; SLM-LABEL: test_pextrw: ; SLM: # %bb.0: -; SLM-NEXT: pextrw $6, %xmm0, %eax # sched: [4:1.00] +; SLM-NEXT: pextrw $6, %xmm0, %eax # sched: [1:1.00] ; SLM-NEXT: # kill: def %ax killed %ax killed %eax ; SLM-NEXT: retq # sched: [4:1.00] ; diff --git a/llvm/test/CodeGen/X86/sse41-schedule.ll b/llvm/test/CodeGen/X86/sse41-schedule.ll index 5e05a365d18..33a042f92b0 100644 --- a/llvm/test/CodeGen/X86/sse41-schedule.ll +++ b/llvm/test/CodeGen/X86/sse41-schedule.ll @@ -1083,7 +1083,7 @@ define i32 @test_pextrw(<8 x i16> %a0, i16 *%a1) { ; ; SLM-LABEL: test_pextrw: ; SLM: # %bb.0: -; SLM-NEXT: pextrw $3, %xmm0, %eax # sched: [4:1.00] +; SLM-NEXT: pextrw $3, %xmm0, %eax # sched: [1:1.00] ; SLM-NEXT: pextrw $1, %xmm0, (%rdi) # sched: [4:2.00] ; SLM-NEXT: retq # sched: [4:1.00] ; |
