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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-07-26 16:39:07 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-07-26 16:39:07 +0000 |
| commit | 0a7d9ac766647eff51759dc5e8ebfb86f1f6ef70 (patch) | |
| tree | cf14a1fd2f073fb29b3d078502f387f59162d71f /llvm/test/CodeGen/X86 | |
| parent | 3f4fe8f4bd0ef5c70a9c91fe3f3e17ff158df130 (diff) | |
| download | bcm5719-llvm-0a7d9ac766647eff51759dc5e8ebfb86f1f6ef70.tar.gz bcm5719-llvm-0a7d9ac766647eff51759dc5e8ebfb86f1f6ef70.zip | |
[X86] Regenerate memset tests
llvm-svn: 309136
Diffstat (limited to 'llvm/test/CodeGen/X86')
| -rw-r--r-- | llvm/test/CodeGen/X86/memset.ll | 109 |
1 files changed, 78 insertions, 31 deletions
diff --git a/llvm/test/CodeGen/X86/memset.ll b/llvm/test/CodeGen/X86/memset.ll index 96a22e88567..784fc9af82a 100644 --- a/llvm/test/CodeGen/X86/memset.ll +++ b/llvm/test/CodeGen/X86/memset.ll @@ -1,39 +1,65 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -march=x86 -mcpu=pentium2 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=X86 ; RUN: llc < %s -march=x86 -mcpu=pentium3 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=XMM ; RUN: llc < %s -march=x86 -mcpu=bdver1 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=YMM - %struct.x = type { i16, i16 } +%struct.x = type { i16, i16 } define void @t() nounwind { +; X86-LABEL: t: +; X86: ## BB#0: ## %entry +; X86-NEXT: subl $44, %esp +; X86-NEXT: movl $0, {{[0-9]+}}(%esp) +; X86-NEXT: movl $0, {{[0-9]+}}(%esp) +; X86-NEXT: movl $0, {{[0-9]+}}(%esp) +; X86-NEXT: movl $0, {{[0-9]+}}(%esp) +; X86-NEXT: movl $0, {{[0-9]+}}(%esp) +; X86-NEXT: movl $0, {{[0-9]+}}(%esp) +; X86-NEXT: movl $0, {{[0-9]+}}(%esp) +; X86-NEXT: movl $0, {{[0-9]+}}(%esp) +; X86-NEXT: leal {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl %eax, (%esp) +; X86-NEXT: calll _foo +; X86-NEXT: addl $44, %esp +; X86-NEXT: retl +; X86-NEXT: ## -- End function +; +; XMM-LABEL: t: +; XMM: ## BB#0: ## %entry +; XMM-NEXT: subl $60, %esp +; XMM-NEXT: xorps %xmm0, %xmm0 +; XMM-NEXT: movaps %xmm0, {{[0-9]+}}(%esp) +; XMM-NEXT: movaps %xmm0, {{[0-9]+}}(%esp) +; XMM-NEXT: leal {{[0-9]+}}(%esp), %eax +; XMM-NEXT: movl %eax, (%esp) +; XMM-NEXT: calll _foo +; XMM-NEXT: addl $60, %esp +; XMM-NEXT: retl +; XMM-NEXT: ## -- End function +; +; YMM-LABEL: t: +; YMM: ## BB#0: ## %entry +; YMM-NEXT: pushl %ebp +; YMM-NEXT: movl %esp, %ebp +; YMM-NEXT: andl $-32, %esp +; YMM-NEXT: subl $96, %esp +; YMM-NEXT: vxorps %ymm0, %ymm0, %ymm0 +; YMM-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp) +; YMM-NEXT: leal {{[0-9]+}}(%esp), %eax +; YMM-NEXT: movl %eax, (%esp) +; YMM-NEXT: vzeroupper +; YMM-NEXT: calll _foo +; YMM-NEXT: movl %ebp, %esp +; YMM-NEXT: popl %ebp +; YMM-NEXT: retl +; YMM-NEXT: ## -- End function entry: %up_mvd = alloca [8 x %struct.x] ; <[8 x %struct.x]*> [#uses=2] %up_mvd116 = getelementptr [8 x %struct.x], [8 x %struct.x]* %up_mvd, i32 0, i32 0 ; <%struct.x*> [#uses=1] %tmp110117 = bitcast [8 x %struct.x]* %up_mvd to i8* ; <i8*> [#uses=1] call void @llvm.memset.p0i8.i64(i8* %tmp110117, i8 0, i64 32, i32 8, i1 false) -; X86: movl $0, -; X86: movl $0, -; X86: movl $0, -; X86: movl $0, -; X86: movl $0, -; X86: movl $0, -; X86: movl $0, -; X86: movl $0, -; X86-NOT: movl $0, -; X86: ret - -; XMM: xorps %xmm{{[0-9]+}}, [[Z:%xmm[0-9]+]] -; XMM: movaps [[Z]], -; XMM: movaps [[Z]], -; XMM-NOT: movaps -; XMM: ret - -; YMM: vxorps %ymm{{[0-9]+}}, %ymm{{[0-9]+}}, [[Z:%ymm[0-9]+]] -; YMM: vmovaps [[Z]], -; YMM-NOT: movaps -; YMM: ret - - call void @foo( %struct.x* %up_mvd116 ) nounwind + call void @foo( %struct.x* %up_mvd116 ) nounwind ret void } @@ -41,15 +67,36 @@ declare void @foo(%struct.x*) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind -define void @PR15348(i8* %a) { ; Ensure that alignment of '0' in an @llvm.memset intrinsic results in ; unaligned loads and stores. -; XMM: PR15348 -; XMM: movb $0, -; XMM: movl $0, -; XMM: movl $0, -; XMM: movl $0, -; XMM: movl $0, +define void @PR15348(i8* %a) { +; X86-LABEL: PR15348: +; X86: ## BB#0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movb $0, 16(%eax) +; X86-NEXT: movl $0, 12(%eax) +; X86-NEXT: movl $0, 8(%eax) +; X86-NEXT: movl $0, 4(%eax) +; X86-NEXT: movl $0, (%eax) +; X86-NEXT: retl +; +; XMM-LABEL: PR15348: +; XMM: ## BB#0: +; XMM-NEXT: movl {{[0-9]+}}(%esp), %eax +; XMM-NEXT: movb $0, 16(%eax) +; XMM-NEXT: movl $0, 12(%eax) +; XMM-NEXT: movl $0, 8(%eax) +; XMM-NEXT: movl $0, 4(%eax) +; XMM-NEXT: movl $0, (%eax) +; XMM-NEXT: retl +; +; YMM-LABEL: PR15348: +; YMM: ## BB#0: +; YMM-NEXT: movl {{[0-9]+}}(%esp), %eax +; YMM-NEXT: vxorps %xmm0, %xmm0, %xmm0 +; YMM-NEXT: vmovups %xmm0, (%eax) +; YMM-NEXT: movb $0, 16(%eax) +; YMM-NEXT: retl call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 17, i32 0, i1 false) ret void } |

