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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-07-11 14:45:03 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-07-11 14:45:03 +0000 |
| commit | d0307f93a7658e6d0eef1ffd0b0ed4f1506bfc13 (patch) | |
| tree | c3dcd1663db7fc6e15ad41249113f21337aa2fbe /llvm/test/CodeGen/X86/vec_saddo.ll | |
| parent | 6eb8ae8f17b4f4ae2523dba3207ef9e2aadc2ad6 (diff) | |
| download | bcm5719-llvm-d0307f93a7658e6d0eef1ffd0b0ed4f1506bfc13.tar.gz bcm5719-llvm-d0307f93a7658e6d0eef1ffd0b0ed4f1506bfc13.zip | |
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
We already split extract_subvector(binop(insert_subvector(v,x),insert_subvector(w,y))) -> binop(x,y).
This patch adds support for extract_subvector(binop(concat_vectors(),concat_vectors())) cases as well.
In particular this means we don't have to wait for X86 lowering to convert concat_vectors to insert_subvector chains, which helps avoid some cases where demandedelts/combine calls occur too late to split large vector ops.
The fast-isel-store.ll load folding regression is annoying but I don't think is that critical.
Differential Revision: https://reviews.llvm.org/D63653
llvm-svn: 365785
Diffstat (limited to 'llvm/test/CodeGen/X86/vec_saddo.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_saddo.ll | 40 |
1 files changed, 18 insertions, 22 deletions
diff --git a/llvm/test/CodeGen/X86/vec_saddo.ll b/llvm/test/CodeGen/X86/vec_saddo.ll index 5b40e3d5e8d..dbe1b728604 100644 --- a/llvm/test/CodeGen/X86/vec_saddo.ll +++ b/llvm/test/CodeGen/X86/vec_saddo.ll @@ -807,50 +807,46 @@ define <16 x i32> @saddo_v16i32(<16 x i32> %a0, <16 x i32> %a1, <16 x i32>* %p2) ; AVX1-NEXT: vpxor %xmm6, %xmm7, %xmm8 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm7 ; AVX1-NEXT: vpcmpgtd %xmm7, %xmm5, %xmm4 -; AVX1-NEXT: vpxor %xmm6, %xmm4, %xmm10 -; AVX1-NEXT: vpcmpeqd %xmm8, %xmm10, %xmm8 -; AVX1-NEXT: vpcmpgtd %xmm3, %xmm5, %xmm4 -; AVX1-NEXT: vpxor %xmm6, %xmm4, %xmm11 -; AVX1-NEXT: vpcmpgtd %xmm1, %xmm5, %xmm4 ; AVX1-NEXT: vpxor %xmm6, %xmm4, %xmm4 -; AVX1-NEXT: vpcmpeqd %xmm11, %xmm4, %xmm11 -; AVX1-NEXT: vinsertf128 $1, %xmm8, %ymm11, %ymm11 +; AVX1-NEXT: vpcmpeqd %xmm8, %xmm4, %xmm8 ; AVX1-NEXT: vpaddd %xmm9, %xmm7, %xmm9 ; AVX1-NEXT: vpcmpgtd %xmm9, %xmm5, %xmm7 ; AVX1-NEXT: vpxor %xmm6, %xmm7, %xmm7 -; AVX1-NEXT: vpcmpeqd %xmm7, %xmm10, %xmm7 +; AVX1-NEXT: vpcmpeqd %xmm7, %xmm4, %xmm4 +; AVX1-NEXT: vpandn %xmm8, %xmm4, %xmm8 +; AVX1-NEXT: vpcmpgtd %xmm3, %xmm5, %xmm7 +; AVX1-NEXT: vpxor %xmm6, %xmm7, %xmm7 +; AVX1-NEXT: vpcmpgtd %xmm1, %xmm5, %xmm4 +; AVX1-NEXT: vpxor %xmm6, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqd %xmm7, %xmm4, %xmm7 ; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm10 ; AVX1-NEXT: vpcmpgtd %xmm10, %xmm5, %xmm1 ; AVX1-NEXT: vpxor %xmm6, %xmm1, %xmm1 ; AVX1-NEXT: vpcmpeqd %xmm1, %xmm4, %xmm1 -; AVX1-NEXT: vinsertf128 $1, %xmm7, %ymm1, %ymm1 -; AVX1-NEXT: vandnps %ymm11, %ymm1, %ymm1 -; AVX1-NEXT: vpandn %xmm8, %xmm7, %xmm4 -; AVX1-NEXT: vpackssdw %xmm4, %xmm1, %xmm8 +; AVX1-NEXT: vpandn %xmm7, %xmm1, %xmm1 +; AVX1-NEXT: vpackssdw %xmm8, %xmm1, %xmm8 ; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 ; AVX1-NEXT: vpcmpgtd %xmm4, %xmm5, %xmm7 ; AVX1-NEXT: vpxor %xmm6, %xmm7, %xmm7 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vpcmpgtd %xmm1, %xmm5, %xmm3 ; AVX1-NEXT: vpxor %xmm6, %xmm3, %xmm3 -; AVX1-NEXT: vpcmpeqd %xmm7, %xmm3, %xmm11 -; AVX1-NEXT: vpcmpgtd %xmm2, %xmm5, %xmm7 -; AVX1-NEXT: vpxor %xmm6, %xmm7, %xmm12 -; AVX1-NEXT: vpcmpgtd %xmm0, %xmm5, %xmm7 -; AVX1-NEXT: vpxor %xmm6, %xmm7, %xmm7 -; AVX1-NEXT: vpcmpeqd %xmm12, %xmm7, %xmm12 -; AVX1-NEXT: vinsertf128 $1, %xmm11, %ymm12, %ymm12 +; AVX1-NEXT: vpcmpeqd %xmm7, %xmm3, %xmm7 ; AVX1-NEXT: vpaddd %xmm4, %xmm1, %xmm4 ; AVX1-NEXT: vpcmpgtd %xmm4, %xmm5, %xmm1 ; AVX1-NEXT: vpxor %xmm6, %xmm1, %xmm1 ; AVX1-NEXT: vpcmpeqd %xmm1, %xmm3, %xmm1 +; AVX1-NEXT: vpandn %xmm7, %xmm1, %xmm1 +; AVX1-NEXT: vpcmpgtd %xmm2, %xmm5, %xmm3 +; AVX1-NEXT: vpxor %xmm6, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpgtd %xmm0, %xmm5, %xmm7 +; AVX1-NEXT: vpxor %xmm6, %xmm7, %xmm7 +; AVX1-NEXT: vpcmpeqd %xmm3, %xmm7, %xmm3 ; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm2 ; AVX1-NEXT: vpcmpgtd %xmm2, %xmm5, %xmm0 ; AVX1-NEXT: vpxor %xmm6, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpeqd %xmm0, %xmm7, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; AVX1-NEXT: vandnps %ymm12, %ymm0, %ymm0 -; AVX1-NEXT: vpandn %xmm11, %xmm1, %xmm1 +; AVX1-NEXT: vpandn %xmm3, %xmm0, %xmm0 ; AVX1-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpacksswb %xmm8, %xmm0, %xmm1 ; AVX1-NEXT: vpmovsxbd %xmm1, %xmm0 |
