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authorSimon Pilgrim <llvm-dev@redking.me.uk>2015-11-18 21:17:19 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2015-11-18 21:17:19 +0000
commitc1a46b729be281974b18339298b8fa64bac81151 (patch)
tree228074690c30dc18ca71a15b88c3eb1e83b87df9 /llvm/test/CodeGen/X86/vec_minmax_sint.ll
parent6e557165097e442c95ad7cc38f1fda113f45c79b (diff)
downloadbcm5719-llvm-c1a46b729be281974b18339298b8fa64bac81151.tar.gz
bcm5719-llvm-c1a46b729be281974b18339298b8fa64bac81151.zip
[DAGCombiner] Vector constant folding for comparisons
This patch adds support for vector constant folding of integer/float comparisons. This requires FoldConstantVectorArithmetic to support scalar constant operands (in this case ISD::CONDCASE). In future we should be able to support other scalar constant types as necessary (and possibly start calling FoldConstantVectorArithmetic for all node creations) Differential Revision: http://reviews.llvm.org/D14683 llvm-svn: 253504
Diffstat (limited to 'llvm/test/CodeGen/X86/vec_minmax_sint.ll')
-rw-r--r--llvm/test/CodeGen/X86/vec_minmax_sint.ll1132
1 files changed, 108 insertions, 1024 deletions
diff --git a/llvm/test/CodeGen/X86/vec_minmax_sint.ll b/llvm/test/CodeGen/X86/vec_minmax_sint.ll
index 80ceb80663a..c38d5a0c173 100644
--- a/llvm/test/CodeGen/X86/vec_minmax_sint.ll
+++ b/llvm/test/CodeGen/X86/vec_minmax_sint.ll
@@ -1601,64 +1601,14 @@ define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) {
;
define <2 x i64> @max_gt_v2i64c() {
-; SSE2-LABEL: max_gt_v2i64c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT: movdqa %xmm0, %xmm3
-; SSE2-NEXT: pxor %xmm2, %xmm3
-; SSE2-NEXT: pxor %xmm1, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm4
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE2-NEXT: pand %xmm5, %xmm3
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm3
-; SSE2-NEXT: pandn %xmm2, %xmm3
-; SSE2-NEXT: pand %xmm1, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_gt_v2i64c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT: movdqa %xmm0, %xmm3
-; SSE41-NEXT: pxor %xmm1, %xmm3
-; SSE41-NEXT: pxor %xmm2, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm4
-; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE41-NEXT: pand %xmm5, %xmm3
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE41-NEXT: por %xmm3, %xmm0
-; SSE41-NEXT: blendvpd %xmm2, %xmm1
-; SSE41-NEXT: movapd %xmm1, %xmm0
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_gt_v2i64c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT: movdqa %xmm2, %xmm0
-; SSE42-NEXT: pcmpgtq %xmm1, %xmm0
-; SSE42-NEXT: blendvpd %xmm2, %xmm1
-; SSE42-NEXT: movapd %xmm1, %xmm0
-; SSE42-NEXT: retq
+; SSE-LABEL: max_gt_v2i64c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7]
+; SSE-NEXT: retq
;
; AVX-LABEL: max_gt_v2i64c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7]
-; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2
-; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7]
; AVX-NEXT: retq
%1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
%2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
@@ -1668,124 +1618,16 @@ define <2 x i64> @max_gt_v2i64c() {
}
define <4 x i64> @max_gt_v4i64c() {
-; SSE2-LABEL: max_gt_v4i64c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [7,1]
-; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT: movdqa %xmm0, %xmm1
-; SSE2-NEXT: pxor %xmm3, %xmm1
-; SSE2-NEXT: movdqa %xmm0, %xmm6
-; SSE2-NEXT: pxor %xmm8, %xmm6
-; SSE2-NEXT: movdqa %xmm6, %xmm7
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm7
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm1, %xmm6
-; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT: pand %xmm2, %xmm6
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
-; SSE2-NEXT: por %xmm6, %xmm1
-; SSE2-NEXT: movdqa %xmm0, %xmm2
-; SSE2-NEXT: pxor %xmm5, %xmm2
-; SSE2-NEXT: pxor %xmm4, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm6
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm6
-; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; SSE2-NEXT: pand %xmm7, %xmm2
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE2-NEXT: por %xmm2, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm2
-; SSE2-NEXT: pandn %xmm5, %xmm2
-; SSE2-NEXT: pand %xmm4, %xmm0
-; SSE2-NEXT: por %xmm2, %xmm0
-; SSE2-NEXT: movdqa %xmm1, %xmm2
-; SSE2-NEXT: pandn %xmm3, %xmm2
-; SSE2-NEXT: pand %xmm8, %xmm1
-; SSE2-NEXT: por %xmm2, %xmm1
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_gt_v4i64c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT: movdqa %xmm0, %xmm3
-; SSE41-NEXT: pxor %xmm1, %xmm3
-; SSE41-NEXT: movdqa %xmm0, %xmm6
-; SSE41-NEXT: pxor %xmm8, %xmm6
-; SSE41-NEXT: movdqa %xmm6, %xmm7
-; SSE41-NEXT: pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT: pand %xmm4, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT: por %xmm6, %xmm3
-; SSE41-NEXT: movdqa %xmm0, %xmm4
-; SSE41-NEXT: pxor %xmm2, %xmm4
-; SSE41-NEXT: pxor %xmm5, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm6
-; SSE41-NEXT: pcmpgtd %xmm4, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm4, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
-; SSE41-NEXT: pand %xmm7, %xmm4
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE41-NEXT: por %xmm4, %xmm0
-; SSE41-NEXT: blendvpd %xmm5, %xmm2
-; SSE41-NEXT: movdqa %xmm3, %xmm0
-; SSE41-NEXT: blendvpd %xmm8, %xmm1
-; SSE41-NEXT: movapd %xmm2, %xmm0
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_gt_v4i64c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT: movdqa %xmm5, %xmm3
-; SSE42-NEXT: pcmpgtq %xmm1, %xmm3
-; SSE42-NEXT: movdqa %xmm4, %xmm0
-; SSE42-NEXT: pcmpgtq %xmm2, %xmm0
-; SSE42-NEXT: blendvpd %xmm4, %xmm2
-; SSE42-NEXT: movdqa %xmm3, %xmm0
-; SSE42-NEXT: blendvpd %xmm5, %xmm1
-; SSE42-NEXT: movapd %xmm2, %xmm0
-; SSE42-NEXT: retq
-;
-; AVX1-LABEL: max_gt_v4i64c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551609,18446744073709551615]
-; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [1,7]
-; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: max_gt_v4i64c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2
-; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX2-NEXT: retq
+; SSE-LABEL: max_gt_v4i64c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7]
+; SSE-NEXT: pcmpeqd %xmm0, %xmm0
+; SSE-NEXT: retq
;
-; AVX512-LABEL: max_gt_v4i64c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2
-; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: max_gt_v4i64c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7]
+; AVX-NEXT: retq
%1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
%2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
%3 = icmp sgt <4 x i64> %1, %2
@@ -1794,26 +1636,10 @@ define <4 x i64> @max_gt_v4i64c() {
}
define <4 x i32> @max_gt_v4i32c() {
-; SSE2-LABEL: max_gt_v4i32c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1]
-; SSE2-NEXT: movdqa %xmm1, %xmm0
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm0
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm1, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_gt_v4i32c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_gt_v4i32c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE42-NEXT: retq
+; SSE-LABEL: max_gt_v4i32c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
+; SSE-NEXT: retq
;
; AVX-LABEL: max_gt_v4i32c:
; AVX: # BB#0:
@@ -1827,35 +1653,11 @@ define <4 x i32> @max_gt_v4i32c() {
}
define <8 x i32> @max_gt_v8i32c() {
-; SSE2-LABEL: max_gt_v8i32c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295]
-; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289]
-; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,5,3,1]
-; SSE2-NEXT: movdqa %xmm3, %xmm1
-; SSE2-NEXT: pcmpgtd %xmm5, %xmm1
-; SSE2-NEXT: movdqa %xmm2, %xmm0
-; SSE2-NEXT: pcmpgtd %xmm4, %xmm0
-; SSE2-NEXT: pand %xmm0, %xmm2
-; SSE2-NEXT: pandn %xmm4, %xmm0
-; SSE2-NEXT: por %xmm2, %xmm0
-; SSE2-NEXT: pand %xmm1, %xmm3
-; SSE2-NEXT: pandn %xmm5, %xmm1
-; SSE2-NEXT: por %xmm3, %xmm1
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_gt_v8i32c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_gt_v8i32c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE42-NEXT: retq
+; SSE-LABEL: max_gt_v8i32c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
+; SSE-NEXT: retq
;
; AVX-LABEL: max_gt_v8i32c:
; AVX: # BB#0:
@@ -1904,26 +1706,10 @@ define <16 x i16> @max_gt_v16i16c() {
}
define <16 x i8> @max_gt_v16i8c() {
-; SSE2-LABEL: max_gt_v16i8c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0]
-; SSE2-NEXT: movdqa %xmm1, %xmm0
-; SSE2-NEXT: pcmpgtb %xmm2, %xmm0
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm1, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_gt_v16i8c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_gt_v16i8c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
-; SSE42-NEXT: retq
+; SSE-LABEL: max_gt_v16i8c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
+; SSE-NEXT: retq
;
; AVX-LABEL: max_gt_v16i8c:
; AVX: # BB#0:
@@ -1937,71 +1723,14 @@ define <16 x i8> @max_gt_v16i8c() {
}
define <2 x i64> @max_ge_v2i64c() {
-; SSE2-LABEL: max_ge_v2i64c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT: movdqa %xmm0, %xmm3
-; SSE2-NEXT: pxor %xmm1, %xmm3
-; SSE2-NEXT: pxor %xmm2, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm4
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE2-NEXT: pand %xmm5, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE2-NEXT: por %xmm0, %xmm3
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: pxor %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm1, %xmm3
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_ge_v2i64c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT: movdqa %xmm0, %xmm3
-; SSE41-NEXT: pxor %xmm2, %xmm3
-; SSE41-NEXT: pxor %xmm1, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm4
-; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE41-NEXT: pand %xmm5, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE41-NEXT: por %xmm0, %xmm3
-; SSE41-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE41-NEXT: pxor %xmm3, %xmm0
-; SSE41-NEXT: blendvpd %xmm2, %xmm1
-; SSE41-NEXT: movapd %xmm1, %xmm0
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_ge_v2i64c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT: movdqa %xmm1, %xmm3
-; SSE42-NEXT: pcmpgtq %xmm2, %xmm3
-; SSE42-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE42-NEXT: pxor %xmm3, %xmm0
-; SSE42-NEXT: blendvpd %xmm2, %xmm1
-; SSE42-NEXT: movapd %xmm1, %xmm0
-; SSE42-NEXT: retq
+; SSE-LABEL: max_ge_v2i64c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7]
+; SSE-NEXT: retq
;
; AVX-LABEL: max_ge_v2i64c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7]
-; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; AVX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2
-; AVX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
-; AVX-NEXT: vpxor %xmm3, %xmm2, %xmm2
-; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7]
; AVX-NEXT: retq
%1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
%2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
@@ -2011,139 +1740,16 @@ define <2 x i64> @max_ge_v2i64c() {
}
define <4 x i64> @max_ge_v4i64c() {
-; SSE2-LABEL: max_ge_v4i64c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [7,1]
-; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,0,2147483648,0]
-; SSE2-NEXT: movdqa %xmm7, %xmm0
-; SSE2-NEXT: pxor %xmm8, %xmm0
-; SSE2-NEXT: movdqa %xmm7, %xmm1
-; SSE2-NEXT: pxor %xmm9, %xmm1
-; SSE2-NEXT: movdqa %xmm1, %xmm6
-; SSE2-NEXT: pcmpgtd %xmm0, %xmm6
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
-; SSE2-NEXT: pand %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT: por %xmm0, %xmm6
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: movdqa %xmm6, %xmm1
-; SSE2-NEXT: pxor %xmm0, %xmm1
-; SSE2-NEXT: movdqa %xmm7, %xmm2
-; SSE2-NEXT: pxor %xmm10, %xmm2
-; SSE2-NEXT: pxor %xmm5, %xmm7
-; SSE2-NEXT: movdqa %xmm7, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm2, %xmm7
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
-; SSE2-NEXT: pand %xmm4, %xmm2
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
-; SSE2-NEXT: por %xmm2, %xmm3
-; SSE2-NEXT: pxor %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm10, %xmm3
-; SSE2-NEXT: pandn %xmm5, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm8, %xmm6
-; SSE2-NEXT: pandn %xmm9, %xmm1
-; SSE2-NEXT: por %xmm6, %xmm1
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_ge_v4i64c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT: movdqa %xmm0, %xmm3
-; SSE41-NEXT: pxor %xmm8, %xmm3
-; SSE41-NEXT: movdqa %xmm0, %xmm6
-; SSE41-NEXT: pxor %xmm1, %xmm6
-; SSE41-NEXT: movdqa %xmm6, %xmm7
-; SSE41-NEXT: pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT: pand %xmm4, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT: por %xmm6, %xmm3
-; SSE41-NEXT: pcmpeqd %xmm4, %xmm4
-; SSE41-NEXT: pxor %xmm4, %xmm3
-; SSE41-NEXT: movdqa %xmm0, %xmm6
-; SSE41-NEXT: pxor %xmm9, %xmm6
-; SSE41-NEXT: pxor %xmm2, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm7
-; SSE41-NEXT: pcmpgtd %xmm6, %xmm7
-; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm6, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
-; SSE41-NEXT: pand %xmm5, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
-; SSE41-NEXT: por %xmm6, %xmm0
-; SSE41-NEXT: pxor %xmm4, %xmm0
-; SSE41-NEXT: blendvpd %xmm9, %xmm2
-; SSE41-NEXT: movdqa %xmm3, %xmm0
-; SSE41-NEXT: blendvpd %xmm8, %xmm1
-; SSE41-NEXT: movapd %xmm2, %xmm0
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_ge_v4i64c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT: movdqa %xmm1, %xmm3
-; SSE42-NEXT: pcmpgtq %xmm5, %xmm3
-; SSE42-NEXT: pcmpeqd %xmm6, %xmm6
-; SSE42-NEXT: pxor %xmm6, %xmm3
-; SSE42-NEXT: movdqa %xmm2, %xmm0
-; SSE42-NEXT: pcmpgtq %xmm4, %xmm0
-; SSE42-NEXT: pxor %xmm6, %xmm0
-; SSE42-NEXT: blendvpd %xmm4, %xmm2
-; SSE42-NEXT: movdqa %xmm3, %xmm0
-; SSE42-NEXT: blendvpd %xmm5, %xmm1
-; SSE42-NEXT: movapd %xmm2, %xmm0
-; SSE42-NEXT: retq
-;
-; AVX1-LABEL: max_ge_v4i64c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [7,1]
-; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
-; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [18446744073709551615,18446744073709551609]
-; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3
-; AVX1-NEXT: vpxor %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
-; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: max_ge_v4i64c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2
-; AVX2-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3
-; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
-; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX2-NEXT: retq
+; SSE-LABEL: max_ge_v4i64c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7]
+; SSE-NEXT: pcmpeqd %xmm0, %xmm0
+; SSE-NEXT: retq
;
-; AVX512-LABEL: max_ge_v4i64c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2
-; AVX512-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3
-; AVX512-NEXT: vpxor %ymm3, %ymm2, %ymm2
-; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: max_ge_v4i64c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7]
+; AVX-NEXT: retq
%1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
%2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
%3 = icmp sge <4 x i64> %1, %2
@@ -2152,28 +1758,10 @@ define <4 x i64> @max_ge_v4i64c() {
}
define <4 x i32> @max_ge_v4i32c() {
-; SSE2-LABEL: max_ge_v4i32c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1]
-; SSE2-NEXT: movdqa %xmm2, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm3
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: pxor %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm1, %xmm3
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_ge_v4i32c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_ge_v4i32c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
-; SSE42-NEXT: retq
+; SSE-LABEL: max_ge_v4i32c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
+; SSE-NEXT: retq
;
; AVX-LABEL: max_ge_v4i32c:
; AVX: # BB#0:
@@ -2187,39 +1775,11 @@ define <4 x i32> @max_ge_v4i32c() {
}
define <8 x i32> @max_ge_v8i32c() {
-; SSE2-LABEL: max_ge_v8i32c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295]
-; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289]
-; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,5,3,1]
-; SSE2-NEXT: movdqa %xmm5, %xmm6
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm6
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: movdqa %xmm6, %xmm1
-; SSE2-NEXT: pxor %xmm0, %xmm1
-; SSE2-NEXT: movdqa %xmm4, %xmm7
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm7
-; SSE2-NEXT: pxor %xmm7, %xmm0
-; SSE2-NEXT: pandn %xmm2, %xmm7
-; SSE2-NEXT: pandn %xmm4, %xmm0
-; SSE2-NEXT: por %xmm7, %xmm0
-; SSE2-NEXT: pandn %xmm3, %xmm6
-; SSE2-NEXT: pandn %xmm5, %xmm1
-; SSE2-NEXT: por %xmm6, %xmm1
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_ge_v8i32c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_ge_v8i32c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
-; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
-; SSE42-NEXT: retq
+; SSE-LABEL: max_ge_v8i32c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
+; SSE-NEXT: retq
;
; AVX-LABEL: max_ge_v8i32c:
; AVX: # BB#0:
@@ -2268,28 +1828,10 @@ define <16 x i16> @max_ge_v16i16c() {
}
define <16 x i8> @max_ge_v16i8c() {
-; SSE2-LABEL: max_ge_v16i8c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0]
-; SSE2-NEXT: movdqa %xmm2, %xmm3
-; SSE2-NEXT: pcmpgtb %xmm1, %xmm3
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: pxor %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm1, %xmm3
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: max_ge_v16i8c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: max_ge_v16i8c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
-; SSE42-NEXT: retq
+; SSE-LABEL: max_ge_v16i8c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
+; SSE-NEXT: retq
;
; AVX-LABEL: max_ge_v16i8c:
; AVX: # BB#0:
@@ -2303,64 +1845,14 @@ define <16 x i8> @max_ge_v16i8c() {
}
define <2 x i64> @min_lt_v2i64c() {
-; SSE2-LABEL: min_lt_v2i64c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT: movdqa %xmm0, %xmm3
-; SSE2-NEXT: pxor %xmm1, %xmm3
-; SSE2-NEXT: pxor %xmm2, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm4
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE2-NEXT: pand %xmm5, %xmm3
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm3
-; SSE2-NEXT: pandn %xmm2, %xmm3
-; SSE2-NEXT: pand %xmm1, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_lt_v2i64c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT: movdqa %xmm0, %xmm3
-; SSE41-NEXT: pxor %xmm2, %xmm3
-; SSE41-NEXT: pxor %xmm1, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm4
-; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
-; SSE41-NEXT: pand %xmm5, %xmm3
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
-; SSE41-NEXT: por %xmm3, %xmm0
-; SSE41-NEXT: blendvpd %xmm2, %xmm1
-; SSE41-NEXT: movapd %xmm1, %xmm0
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_lt_v2i64c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT: movdqa %xmm1, %xmm0
-; SSE42-NEXT: pcmpgtq %xmm2, %xmm0
-; SSE42-NEXT: blendvpd %xmm2, %xmm1
-; SSE42-NEXT: movapd %xmm1, %xmm0
-; SSE42-NEXT: retq
+; SSE-LABEL: min_lt_v2i64c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1]
+; SSE-NEXT: retq
;
; AVX-LABEL: min_lt_v2i64c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7]
-; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; AVX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2
-; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1]
; AVX-NEXT: retq
%1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
%2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
@@ -2370,124 +1862,16 @@ define <2 x i64> @min_lt_v2i64c() {
}
define <4 x i64> @min_lt_v4i64c() {
-; SSE2-LABEL: min_lt_v4i64c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [7,1]
-; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT: movdqa %xmm0, %xmm1
-; SSE2-NEXT: pxor %xmm8, %xmm1
-; SSE2-NEXT: movdqa %xmm0, %xmm6
-; SSE2-NEXT: pxor %xmm3, %xmm6
-; SSE2-NEXT: movdqa %xmm6, %xmm7
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm7
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm1, %xmm6
-; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT: pand %xmm2, %xmm6
-; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
-; SSE2-NEXT: por %xmm6, %xmm1
-; SSE2-NEXT: movdqa %xmm0, %xmm2
-; SSE2-NEXT: pxor %xmm4, %xmm2
-; SSE2-NEXT: pxor %xmm5, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm6
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm6
-; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
-; SSE2-NEXT: pand %xmm7, %xmm2
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE2-NEXT: por %xmm2, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm2
-; SSE2-NEXT: pandn %xmm5, %xmm2
-; SSE2-NEXT: pand %xmm4, %xmm0
-; SSE2-NEXT: por %xmm2, %xmm0
-; SSE2-NEXT: movdqa %xmm1, %xmm2
-; SSE2-NEXT: pandn %xmm3, %xmm2
-; SSE2-NEXT: pand %xmm8, %xmm1
-; SSE2-NEXT: por %xmm2, %xmm1
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_lt_v4i64c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT: movdqa %xmm0, %xmm3
-; SSE41-NEXT: pxor %xmm8, %xmm3
-; SSE41-NEXT: movdqa %xmm0, %xmm6
-; SSE41-NEXT: pxor %xmm1, %xmm6
-; SSE41-NEXT: movdqa %xmm6, %xmm7
-; SSE41-NEXT: pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT: pand %xmm4, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT: por %xmm6, %xmm3
-; SSE41-NEXT: movdqa %xmm0, %xmm4
-; SSE41-NEXT: pxor %xmm5, %xmm4
-; SSE41-NEXT: pxor %xmm2, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm6
-; SSE41-NEXT: pcmpgtd %xmm4, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm4, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
-; SSE41-NEXT: pand %xmm7, %xmm4
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,3,3]
-; SSE41-NEXT: por %xmm4, %xmm0
-; SSE41-NEXT: blendvpd %xmm5, %xmm2
-; SSE41-NEXT: movdqa %xmm3, %xmm0
-; SSE41-NEXT: blendvpd %xmm8, %xmm1
-; SSE41-NEXT: movapd %xmm2, %xmm0
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_lt_v4i64c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT: movdqa %xmm1, %xmm3
-; SSE42-NEXT: pcmpgtq %xmm5, %xmm3
-; SSE42-NEXT: movdqa %xmm2, %xmm0
-; SSE42-NEXT: pcmpgtq %xmm4, %xmm0
-; SSE42-NEXT: blendvpd %xmm4, %xmm2
-; SSE42-NEXT: movdqa %xmm3, %xmm0
-; SSE42-NEXT: blendvpd %xmm5, %xmm1
-; SSE42-NEXT: movapd %xmm2, %xmm0
-; SSE42-NEXT: retq
-;
-; AVX1-LABEL: min_lt_v4i64c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,18446744073709551609]
-; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [7,1]
-; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm2, %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
-; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: min_lt_v4i64c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2
-; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX2-NEXT: retq
+; SSE-LABEL: min_lt_v4i64c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609]
+; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1]
+; SSE-NEXT: retq
;
-; AVX512-LABEL: min_lt_v4i64c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2
-; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: min_lt_v4i64c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1]
+; AVX-NEXT: retq
%1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
%2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
%3 = icmp slt <4 x i64> %1, %2
@@ -2496,26 +1880,10 @@ define <4 x i64> @min_lt_v4i64c() {
}
define <4 x i32> @min_lt_v4i32c() {
-; SSE2-LABEL: min_lt_v4i32c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1]
-; SSE2-NEXT: movdqa %xmm2, %xmm0
-; SSE2-NEXT: pcmpgtd %xmm1, %xmm0
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm1, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_lt_v4i32c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_lt_v4i32c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE42-NEXT: retq
+; SSE-LABEL: min_lt_v4i32c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
+; SSE-NEXT: retq
;
; AVX-LABEL: min_lt_v4i32c:
; AVX: # BB#0:
@@ -2529,35 +1897,11 @@ define <4 x i32> @min_lt_v4i32c() {
}
define <8 x i32> @min_lt_v8i32c() {
-; SSE2-LABEL: min_lt_v8i32c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295]
-; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289]
-; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,5,3,1]
-; SSE2-NEXT: movdqa %xmm5, %xmm1
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm1
-; SSE2-NEXT: movdqa %xmm4, %xmm0
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm0
-; SSE2-NEXT: pand %xmm0, %xmm2
-; SSE2-NEXT: pandn %xmm4, %xmm0
-; SSE2-NEXT: por %xmm2, %xmm0
-; SSE2-NEXT: pand %xmm1, %xmm3
-; SSE2-NEXT: pandn %xmm5, %xmm1
-; SSE2-NEXT: por %xmm3, %xmm1
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_lt_v8i32c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_lt_v8i32c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE42-NEXT: retq
+; SSE-LABEL: min_lt_v8i32c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
+; SSE-NEXT: retq
;
; AVX-LABEL: min_lt_v8i32c:
; AVX: # BB#0:
@@ -2606,26 +1950,10 @@ define <16 x i16> @min_lt_v16i16c() {
}
define <16 x i8> @min_lt_v16i8c() {
-; SSE2-LABEL: min_lt_v16i8c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0]
-; SSE2-NEXT: movdqa %xmm2, %xmm0
-; SSE2-NEXT: pcmpgtb %xmm1, %xmm0
-; SSE2-NEXT: pand %xmm0, %xmm1
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm1, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_lt_v16i8c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_lt_v16i8c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
-; SSE42-NEXT: retq
+; SSE-LABEL: min_lt_v16i8c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
+; SSE-NEXT: retq
;
; AVX-LABEL: min_lt_v16i8c:
; AVX: # BB#0:
@@ -2639,71 +1967,14 @@ define <16 x i8> @min_lt_v16i8c() {
}
define <2 x i64> @min_le_v2i64c() {
-; SSE2-LABEL: min_le_v2i64c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551609,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,1]
-; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE2-NEXT: movdqa %xmm0, %xmm3
-; SSE2-NEXT: pxor %xmm2, %xmm3
-; SSE2-NEXT: pxor %xmm1, %xmm0
-; SSE2-NEXT: movdqa %xmm0, %xmm4
-; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
-; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm3, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE2-NEXT: pand %xmm5, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE2-NEXT: por %xmm0, %xmm3
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: pxor %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm1, %xmm3
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_le_v2i64c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT: movdqa %xmm0, %xmm3
-; SSE41-NEXT: pxor %xmm1, %xmm3
-; SSE41-NEXT: pxor %xmm2, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm4
-; SSE41-NEXT: pcmpgtd %xmm3, %xmm4
-; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm3, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
-; SSE41-NEXT: pand %xmm5, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
-; SSE41-NEXT: por %xmm0, %xmm3
-; SSE41-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE41-NEXT: pxor %xmm3, %xmm0
-; SSE41-NEXT: blendvpd %xmm2, %xmm1
-; SSE41-NEXT: movapd %xmm1, %xmm0
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_le_v2i64c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551609,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; SSE42-NEXT: movdqa %xmm2, %xmm3
-; SSE42-NEXT: pcmpgtq %xmm1, %xmm3
-; SSE42-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE42-NEXT: pxor %xmm3, %xmm0
-; SSE42-NEXT: blendvpd %xmm2, %xmm1
-; SSE42-NEXT: movapd %xmm1, %xmm0
-; SSE42-NEXT: retq
+; SSE-LABEL: min_le_v2i64c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1]
+; SSE-NEXT: retq
;
; AVX-LABEL: min_le_v2i64c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [18446744073709551609,7]
-; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551615,1]
-; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2
-; AVX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
-; AVX-NEXT: vpxor %xmm3, %xmm2, %xmm2
-; AVX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1]
; AVX-NEXT: retq
%1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
%2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
@@ -2713,139 +1984,16 @@ define <2 x i64> @min_le_v2i64c() {
}
define <4 x i64> @min_le_v4i64c() {
-; SSE2-LABEL: min_le_v4i64c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [18446744073709551609,18446744073709551615]
-; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [18446744073709551615,18446744073709551609]
-; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [7,1]
-; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,0,2147483648,0]
-; SSE2-NEXT: movdqa %xmm7, %xmm0
-; SSE2-NEXT: pxor %xmm9, %xmm0
-; SSE2-NEXT: movdqa %xmm7, %xmm1
-; SSE2-NEXT: pxor %xmm8, %xmm1
-; SSE2-NEXT: movdqa %xmm1, %xmm6
-; SSE2-NEXT: pcmpgtd %xmm0, %xmm6
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
-; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
-; SSE2-NEXT: pand %xmm2, %xmm0
-; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE2-NEXT: por %xmm0, %xmm6
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: movdqa %xmm6, %xmm1
-; SSE2-NEXT: pxor %xmm0, %xmm1
-; SSE2-NEXT: movdqa %xmm7, %xmm2
-; SSE2-NEXT: pxor %xmm5, %xmm2
-; SSE2-NEXT: pxor %xmm10, %xmm7
-; SSE2-NEXT: movdqa %xmm7, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
-; SSE2-NEXT: pcmpeqd %xmm2, %xmm7
-; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
-; SSE2-NEXT: pand %xmm4, %xmm2
-; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
-; SSE2-NEXT: por %xmm2, %xmm3
-; SSE2-NEXT: pxor %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm10, %xmm3
-; SSE2-NEXT: pandn %xmm5, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm8, %xmm6
-; SSE2-NEXT: pandn %xmm9, %xmm1
-; SSE2-NEXT: por %xmm6, %xmm1
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_le_v4i64c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [18446744073709551609,18446744073709551615]
-; SSE41-NEXT: movdqa {{.*#+}} xmm8 = [1,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0]
-; SSE41-NEXT: movdqa %xmm0, %xmm3
-; SSE41-NEXT: pxor %xmm1, %xmm3
-; SSE41-NEXT: movdqa %xmm0, %xmm6
-; SSE41-NEXT: pxor %xmm8, %xmm6
-; SSE41-NEXT: movdqa %xmm6, %xmm7
-; SSE41-NEXT: pcmpgtd %xmm3, %xmm7
-; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm7[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm3, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
-; SSE41-NEXT: pand %xmm4, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm7[1,1,3,3]
-; SSE41-NEXT: por %xmm6, %xmm3
-; SSE41-NEXT: pcmpeqd %xmm4, %xmm4
-; SSE41-NEXT: pxor %xmm4, %xmm3
-; SSE41-NEXT: movdqa %xmm0, %xmm6
-; SSE41-NEXT: pxor %xmm2, %xmm6
-; SSE41-NEXT: pxor %xmm9, %xmm0
-; SSE41-NEXT: movdqa %xmm0, %xmm7
-; SSE41-NEXT: pcmpgtd %xmm6, %xmm7
-; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,0,2,2]
-; SSE41-NEXT: pcmpeqd %xmm6, %xmm0
-; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm0[1,1,3,3]
-; SSE41-NEXT: pand %xmm5, %xmm6
-; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
-; SSE41-NEXT: por %xmm6, %xmm0
-; SSE41-NEXT: pxor %xmm4, %xmm0
-; SSE41-NEXT: blendvpd %xmm9, %xmm2
-; SSE41-NEXT: movdqa %xmm3, %xmm0
-; SSE41-NEXT: blendvpd %xmm8, %xmm1
-; SSE41-NEXT: movapd %xmm2, %xmm0
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_le_v4i64c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [18446744073709551609,18446744073709551615]
-; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [18446744073709551615,18446744073709551609]
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [7,1]
-; SSE42-NEXT: movdqa %xmm5, %xmm3
-; SSE42-NEXT: pcmpgtq %xmm1, %xmm3
-; SSE42-NEXT: pcmpeqd %xmm6, %xmm6
-; SSE42-NEXT: pxor %xmm6, %xmm3
-; SSE42-NEXT: movdqa %xmm4, %xmm0
-; SSE42-NEXT: pcmpgtq %xmm2, %xmm0
-; SSE42-NEXT: pxor %xmm6, %xmm0
-; SSE42-NEXT: blendvpd %xmm4, %xmm2
-; SSE42-NEXT: movdqa %xmm3, %xmm0
-; SSE42-NEXT: blendvpd %xmm5, %xmm1
-; SSE42-NEXT: movapd %xmm2, %xmm0
-; SSE42-NEXT: retq
-;
-; AVX1-LABEL: min_le_v4i64c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovapd {{.*#+}} ymm0 = [18446744073709551615,18446744073709551609,7,1]
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,7]
-; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
-; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [18446744073709551609,18446744073709551615]
-; AVX1-NEXT: vpcmpgtq {{.*}}(%rip), %xmm3, %xmm3
-; AVX1-NEXT: vpxor %xmm2, %xmm3, %xmm2
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
-; AVX1-NEXT: vblendvpd %ymm1, {{.*}}(%rip), %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: min_le_v4i64c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2
-; AVX2-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3
-; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
-; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX2-NEXT: retq
+; SSE-LABEL: min_le_v4i64c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609]
+; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1]
+; SSE-NEXT: retq
;
-; AVX512-LABEL: min_le_v4i64c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [18446744073709551609,18446744073709551615,1,7]
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [18446744073709551615,18446744073709551609,7,1]
-; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2
-; AVX512-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3
-; AVX512-NEXT: vpxor %ymm3, %ymm2, %ymm2
-; AVX512-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: min_le_v4i64c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1]
+; AVX-NEXT: retq
%1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
%2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
%3 = icmp sle <4 x i64> %1, %2
@@ -2854,28 +2002,10 @@ define <4 x i64> @min_le_v4i64c() {
}
define <4 x i32> @min_le_v4i32c() {
-; SSE2-LABEL: min_le_v4i32c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4294967289,4294967295,1,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967289,7,1]
-; SSE2-NEXT: movdqa %xmm1, %xmm3
-; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: pxor %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm1, %xmm3
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_le_v4i32c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_le_v4i32c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
-; SSE42-NEXT: retq
+; SSE-LABEL: min_le_v4i32c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
+; SSE-NEXT: retq
;
; AVX-LABEL: min_le_v4i32c:
; AVX: # BB#0:
@@ -2889,39 +2019,11 @@ define <4 x i32> @min_le_v4i32c() {
}
define <8 x i32> @min_le_v8i32c() {
-; SSE2-LABEL: min_le_v8i32c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967289,4294967291,4294967293,4294967295]
-; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,3,5,7]
-; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4294967295,4294967293,4294967291,4294967289]
-; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [7,5,3,1]
-; SSE2-NEXT: movdqa %xmm3, %xmm6
-; SSE2-NEXT: pcmpgtd %xmm5, %xmm6
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: movdqa %xmm6, %xmm1
-; SSE2-NEXT: pxor %xmm0, %xmm1
-; SSE2-NEXT: movdqa %xmm2, %xmm7
-; SSE2-NEXT: pcmpgtd %xmm4, %xmm7
-; SSE2-NEXT: pxor %xmm7, %xmm0
-; SSE2-NEXT: pandn %xmm2, %xmm7
-; SSE2-NEXT: pandn %xmm4, %xmm0
-; SSE2-NEXT: por %xmm7, %xmm0
-; SSE2-NEXT: pandn %xmm3, %xmm6
-; SSE2-NEXT: pandn %xmm5, %xmm1
-; SSE2-NEXT: por %xmm6, %xmm1
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_le_v8i32c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_le_v8i32c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
-; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
-; SSE42-NEXT: retq
+; SSE-LABEL: min_le_v8i32c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
+; SSE-NEXT: retq
;
; AVX-LABEL: min_le_v8i32c:
; AVX: # BB#0:
@@ -2970,28 +2072,10 @@ define <16 x i16> @min_le_v16i16c() {
}
define <16 x i8> @min_le_v16i8c() {
-; SSE2-LABEL: min_le_v16i8c:
-; SSE2: # BB#0:
-; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,254,253,252,251,250,249,0,7,6,5,4,3,2,1,0]
-; SSE2-NEXT: movdqa %xmm1, %xmm3
-; SSE2-NEXT: pcmpgtb %xmm2, %xmm3
-; SSE2-NEXT: pcmpeqd %xmm0, %xmm0
-; SSE2-NEXT: pxor %xmm3, %xmm0
-; SSE2-NEXT: pandn %xmm1, %xmm3
-; SSE2-NEXT: pandn %xmm2, %xmm0
-; SSE2-NEXT: por %xmm3, %xmm0
-; SSE2-NEXT: retq
-;
-; SSE41-LABEL: min_le_v16i8c:
-; SSE41: # BB#0:
-; SSE41-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
-; SSE41-NEXT: retq
-;
-; SSE42-LABEL: min_le_v16i8c:
-; SSE42: # BB#0:
-; SSE42-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
-; SSE42-NEXT: retq
+; SSE-LABEL: min_le_v16i8c:
+; SSE: # BB#0:
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
+; SSE-NEXT: retq
;
; AVX-LABEL: min_le_v16i8c:
; AVX: # BB#0:
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