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authorEvan Cheng <evan.cheng@apple.com>2008-05-04 09:15:50 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-05-04 09:15:50 +0000
commitd9481366e3638717e529c9392b5fa125a02e9b2b (patch)
treeac36f2307050320ac63f916c0b963b57d8dc0a17 /llvm/test/CodeGen/X86/mmx-shift.ll
parent2d7a4d70c3b8efb18d2997d55e210ee8a6263cbe (diff)
downloadbcm5719-llvm-d9481366e3638717e529c9392b5fa125a02e9b2b.tar.gz
bcm5719-llvm-d9481366e3638717e529c9392b5fa125a02e9b2b.zip
Select vector shift with non-immediate i32 shift amount operand by first moving the operand into the right register.
llvm-svn: 50619
Diffstat (limited to 'llvm/test/CodeGen/X86/mmx-shift.ll')
-rw-r--r--llvm/test/CodeGen/X86/mmx-shift.ll11
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/mmx-shift.ll b/llvm/test/CodeGen/X86/mmx-shift.ll
index 82eeafd0752..277cf075cb9 100644
--- a/llvm/test/CodeGen/X86/mmx-shift.ll
+++ b/llvm/test/CodeGen/X86/mmx-shift.ll
@@ -1,6 +1,7 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep psllq | grep 32
; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep psllq | grep 32
; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep psrad
+; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep psrlw
define i64 @t1(<1 x i64> %mm1) nounwind {
entry:
@@ -19,3 +20,13 @@ entry:
}
declare <2 x i32> @llvm.x86.mmx.psra.d(<2 x i32>, <2 x i32>) nounwind readnone
+
+define i64 @t3(<1 x i64> %mm1, i32 %bits) nounwind {
+entry:
+ %tmp6 = bitcast <1 x i64> %mm1 to <4 x i16> ; <<4 x i16>> [#uses=1]
+ %tmp8 = tail call <4 x i16> @llvm.x86.mmx.psrli.w( <4 x i16> %tmp6, i32 %bits ) nounwind readnone ; <<4 x i16>> [#uses=1]
+ %retval1314 = bitcast <4 x i16> %tmp8 to i64 ; <i64> [#uses=1]
+ ret i64 %retval1314
+}
+
+declare <4 x i16> @llvm.x86.mmx.psrli.w(<4 x i16>, i32) nounwind readnone
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