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authorSimon Pilgrim <llvm-dev@redking.me.uk>2016-01-15 09:52:50 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2016-01-15 09:52:50 +0000
commitcff8550121f37ac8b97eafb69960c71d4fed03d1 (patch)
treec885c1801fced9597f7ee177fc34a566ee8b2077 /llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll
parentf01488e2bc76f143684be686ed118343cf8da74e (diff)
downloadbcm5719-llvm-cff8550121f37ac8b97eafb69960c71d4fed03d1.tar.gz
bcm5719-llvm-cff8550121f37ac8b97eafb69960c71d4fed03d1.zip
[X86][SSE] Added more exhaustive merge consecutive load tests
llvm-svn: 257876
Diffstat (limited to 'llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll')
-rw-r--r--llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll91
1 files changed, 91 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll b/llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll
new file mode 100644
index 00000000000..575d539837b
--- /dev/null
+++ b/llvm/test/CodeGen/X86/merge-consecutive-loads-256.ll
@@ -0,0 +1,91 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+
+define <4 x double> @merge_4f64_2f64_23(<2 x double>* %ptr) nounwind uwtable noinline ssp {
+; AVX-LABEL: merge_4f64_2f64_23:
+; AVX: # BB#0:
+; AVX-NEXT: vmovups 32(%rdi), %ymm0
+; AVX-NEXT: retq
+ %ptr0 = getelementptr inbounds <2 x double>, <2 x double>* %ptr, i64 2
+ %ptr1 = getelementptr inbounds <2 x double>, <2 x double>* %ptr, i64 3
+ %val0 = load <2 x double>, <2 x double>* %ptr0
+ %val1 = load <2 x double>, <2 x double>* %ptr1
+ %res = shufflevector <2 x double> %val0, <2 x double> %val1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+ ret <4 x double> %res
+}
+
+define <4 x double> @merge_4f64_2f64_2z(<2 x double>* %ptr) nounwind uwtable noinline ssp {
+; AVX-LABEL: merge_4f64_2f64_2z:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps 32(%rdi), %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
+; AVX-NEXT: retq
+ %ptr0 = getelementptr inbounds <2 x double>, <2 x double>* %ptr, i64 2
+ %val0 = load <2 x double>, <2 x double>* %ptr0
+ %res = shufflevector <2 x double> %val0, <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+ ret <4 x double> %res
+}
+
+define <4 x double> @merge_4f64_f64_2345(double* %ptr) nounwind uwtable noinline ssp {
+; AVX-LABEL: merge_4f64_f64_2345:
+; AVX: # BB#0:
+; AVX-NEXT: vmovups 16(%rdi), %ymm0
+; AVX-NEXT: retq
+ %ptr0 = getelementptr inbounds double, double* %ptr, i64 2
+ %ptr1 = getelementptr inbounds double, double* %ptr, i64 3
+ %ptr2 = getelementptr inbounds double, double* %ptr, i64 4
+ %ptr3 = getelementptr inbounds double, double* %ptr, i64 5
+ %val0 = load double, double* %ptr0
+ %val1 = load double, double* %ptr1
+ %val2 = load double, double* %ptr2
+ %val3 = load double, double* %ptr3
+ %res0 = insertelement <4 x double> undef, double %val0, i32 0
+ %res1 = insertelement <4 x double> %res0, double %val1, i32 1
+ %res2 = insertelement <4 x double> %res1, double %val2, i32 2
+ %res3 = insertelement <4 x double> %res2, double %val3, i32 3
+ ret <4 x double> %res3
+}
+
+define <4 x double> @merge_4f64_f64_3zuu(double* %ptr) nounwind uwtable noinline ssp {
+; AVX-LABEL: merge_4f64_f64_3zuu:
+; AVX: # BB#0:
+; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; AVX-NEXT: retq
+ %ptr0 = getelementptr inbounds double, double* %ptr, i64 3
+ %val0 = load double, double* %ptr0
+ %res0 = insertelement <4 x double> undef, double %val0, i32 0
+ %res1 = insertelement <4 x double> %res0, double 0.0, i32 1
+ ret <4 x double> %res1
+}
+
+define <4 x double> @merge_4f64_f64_34uu(double* %ptr) nounwind uwtable noinline ssp {
+; AVX-LABEL: merge_4f64_f64_34uu:
+; AVX: # BB#0:
+; AVX-NEXT: vmovups 24(%rdi), %xmm0
+; AVX-NEXT: retq
+ %ptr0 = getelementptr inbounds double, double* %ptr, i64 3
+ %ptr1 = getelementptr inbounds double, double* %ptr, i64 4
+ %val0 = load double, double* %ptr0
+ %val1 = load double, double* %ptr1
+ %res0 = insertelement <4 x double> undef, double %val0, i32 0
+ %res1 = insertelement <4 x double> %res0, double %val1, i32 1
+ ret <4 x double> %res1
+}
+
+define <4 x double> @merge_4f64_f64_45zz(double* %ptr) nounwind uwtable noinline ssp {
+; AVX-LABEL: merge_4f64_f64_45zz:
+; AVX: # BB#0:
+; AVX-NEXT: vmovups 32(%rdi), %xmm0
+; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
+; AVX-NEXT: retq
+ %ptr0 = getelementptr inbounds double, double* %ptr, i64 4
+ %ptr1 = getelementptr inbounds double, double* %ptr, i64 5
+ %val0 = load double, double* %ptr0
+ %val1 = load double, double* %ptr1
+ %res0 = insertelement <4 x double> zeroinitializer, double %val0, i32 0
+ %res1 = insertelement <4 x double> %res0, double %val1, i32 1
+ ret <4 x double> %res1
+}
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